Lines Matching refs:TDCR
35 #define TDCR 0x40 /* Control */ macro
145 writel(readl(tdmac->reg_base + TDCR) | TDCR_FETCHND, in mmp_tdma_chan_set_desc()
146 tdmac->reg_base + TDCR); in mmp_tdma_chan_set_desc()
160 writel(readl(tdmac->reg_base + TDCR) | TDCR_CHANEN, in mmp_tdma_enable_chan()
161 tdmac->reg_base + TDCR); in mmp_tdma_enable_chan()
170 tdcr = readl(tdmac->reg_base + TDCR); in mmp_tdma_disable_chan()
173 writel(tdcr, tdmac->reg_base + TDCR); in mmp_tdma_disable_chan()
184 writel(readl(tdmac->reg_base + TDCR) | TDCR_CHANEN, in mmp_tdma_resume_chan()
185 tdmac->reg_base + TDCR); in mmp_tdma_resume_chan()
195 writel(readl(tdmac->reg_base + TDCR) & ~TDCR_CHANEN, in mmp_tdma_pause_chan()
196 tdmac->reg_base + TDCR); in mmp_tdma_pause_chan()
283 writel(tdcr, tdmac->reg_base + TDCR); in mmp_tdma_config_chan()