66 	u32 cfglo = 0;  in idma64_chan_init()  local
69 	cfglo |= IDMA64C_CFGL_DST_BURST_ALIGN | IDMA64C_CFGL_SRC_BURST_ALIGN;  in idma64_chan_init()
71 	channel_writel(idma64c, CFG_LO, cfglo);  in idma64_chan_init()
426 	u32 cfglo;  in idma64_chan_deactivate()  local
428 	cfglo = channel_readl(idma64c, CFG_LO);  in idma64_chan_deactivate()
430 		cfglo |= IDMA64C_CFGL_CH_DRAIN;  in idma64_chan_deactivate()
432 		cfglo &= ~IDMA64C_CFGL_CH_DRAIN;  in idma64_chan_deactivate()
434 	channel_writel(idma64c, CFG_LO, cfglo | IDMA64C_CFGL_CH_SUSP);  in idma64_chan_deactivate()
437 		cfglo = channel_readl(idma64c, CFG_LO);  in idma64_chan_deactivate()
438 	} while (!(cfglo & IDMA64C_CFGL_FIFO_EMPTY) && --count);  in idma64_chan_deactivate()
443 	u32 cfglo;  in idma64_chan_activate()  local
445 	cfglo = channel_readl(idma64c, CFG_LO);  in idma64_chan_activate()
446 	channel_writel(idma64c, CFG_LO, cfglo & ~IDMA64C_CFGL_CH_SUSP);  in idma64_chan_activate()