307 static void m2p_set_control(struct ep93xx_dma_chan *edmac, u32 control)  in m2p_set_control()  argument
309 	writel(control, edmac->regs + M2P_CONTROL);  in m2p_set_control()
320 	u32 control;  in m2p_hw_setup()  local
324 	control = M2P_CONTROL_CH_ERROR_INT | M2P_CONTROL_ICE  in m2p_hw_setup()
326 	m2p_set_control(edmac, control);  in m2p_hw_setup()
341 	u32 control;  in m2p_hw_synchronize()  local
344 	control = readl(edmac->regs + M2P_CONTROL);  in m2p_hw_synchronize()
345 	control &= ~(M2P_CONTROL_STALLINT | M2P_CONTROL_NFBINT);  in m2p_hw_synchronize()
346 	m2p_set_control(edmac, control);  in m2p_hw_synchronize()
390 	u32 control = readl(edmac->regs + M2P_CONTROL);  in m2p_hw_submit()  local
393 	control |= M2P_CONTROL_STALLINT;  in m2p_hw_submit()
397 		control |= M2P_CONTROL_NFBINT;  in m2p_hw_submit()
400 	m2p_set_control(edmac, control);  in m2p_hw_submit()
406 	u32 control;  in m2p_hw_interrupt()  local
446 	control = readl(edmac->regs + M2P_CONTROL);  in m2p_hw_interrupt()
447 	control &= ~(M2P_CONTROL_STALLINT | M2P_CONTROL_NFBINT);  in m2p_hw_interrupt()
448 	m2p_set_control(edmac, control);  in m2p_hw_interrupt()
460 	u32 control = 0;  in m2m_hw_setup()  local
464 		writel(control, edmac->regs + M2M_CONTROL);  in m2m_hw_setup()
475 		control = (5 << M2M_CONTROL_PWSC_SHIFT);  in m2m_hw_setup()
476 		control |= M2M_CONTROL_NO_HDSK;  in m2m_hw_setup()
479 			control |= M2M_CONTROL_DAH;  in m2m_hw_setup()
480 			control |= M2M_CONTROL_TM_TX;  in m2m_hw_setup()
481 			control |= M2M_CONTROL_RSS_SSPTX;  in m2m_hw_setup()
483 			control |= M2M_CONTROL_SAH;  in m2m_hw_setup()
484 			control |= M2M_CONTROL_TM_RX;  in m2m_hw_setup()
485 			control |= M2M_CONTROL_RSS_SSPRX;  in m2m_hw_setup()
496 			control = (3 << M2M_CONTROL_PWSC_SHIFT);  in m2m_hw_setup()
497 			control |= M2M_CONTROL_DAH;  in m2m_hw_setup()
498 			control |= M2M_CONTROL_TM_TX;  in m2m_hw_setup()
500 			control = (2 << M2M_CONTROL_PWSC_SHIFT);  in m2m_hw_setup()
501 			control |= M2M_CONTROL_SAH;  in m2m_hw_setup()
502 			control |= M2M_CONTROL_TM_RX;  in m2m_hw_setup()
505 		control |= M2M_CONTROL_NO_HDSK;  in m2m_hw_setup()
506 		control |= M2M_CONTROL_RSS_IDE;  in m2m_hw_setup()
507 		control |= M2M_CONTROL_PW_16;  in m2m_hw_setup()
514 	writel(control, edmac->regs + M2M_CONTROL);  in m2m_hw_setup()
550 	u32 control = readl(edmac->regs + M2M_CONTROL);  in m2m_hw_submit()  local
557 	control &= ~M2M_CONTROL_PW_MASK;  in m2m_hw_submit()
558 	control |= edmac->runtime_ctrl;  in m2m_hw_submit()
561 	control |= M2M_CONTROL_DONEINT;  in m2m_hw_submit()
565 		control |= M2M_CONTROL_NFBINT;  in m2m_hw_submit()
572 	control |= M2M_CONTROL_ENABLE;  in m2m_hw_submit()
573 	writel(control, edmac->regs + M2M_CONTROL);  in m2m_hw_submit()
580 		control |= M2M_CONTROL_START;  in m2m_hw_submit()
581 		writel(control, edmac->regs + M2M_CONTROL);  in m2m_hw_submit()
602 	u32 control;  in m2m_hw_interrupt()  local
639 				control = readl(edmac->regs + M2M_CONTROL);  in m2m_hw_interrupt()
640 				control |= M2M_CONTROL_START;  in m2m_hw_interrupt()
641 				writel(control, edmac->regs + M2M_CONTROL);  in m2m_hw_interrupt()
657 		control = readl(edmac->regs + M2M_CONTROL);  in m2m_hw_interrupt()
658 		control &= ~(M2M_CONTROL_DONEINT | M2M_CONTROL_NFBINT  in m2m_hw_interrupt()
660 		writel(control, edmac->regs + M2M_CONTROL);  in m2m_hw_interrupt()