Lines Matching refs:dw
106 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in dwc_desc_get() local
110 desc = dma_pool_zalloc(dw->desc_pool, GFP_ATOMIC, &phys); in dwc_desc_get()
125 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in dwc_desc_put() local
133 dma_pool_free(dw->desc_pool, child, child->txd.phys); in dwc_desc_put()
137 dma_pool_free(dw->desc_pool, desc, desc->txd.phys); in dwc_desc_put()
179 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in dwc_initialize() local
184 if (dw->pdata->is_idma32) in dwc_initialize()
190 channel_set_bit(dw, MASK.XFER, dwc->mask); in dwc_initialize()
191 channel_set_bit(dw, MASK.ERROR, dwc->mask); in dwc_initialize()
209 static inline void dwc_chan_disable(struct dw_dma *dw, struct dw_dma_chan *dwc) in dwc_chan_disable() argument
211 channel_clear_bit(dw, CH_EN, dwc->mask); in dwc_chan_disable()
212 while (dma_readl(dw, CH_EN) & dwc->mask) in dwc_chan_disable()
219 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in bytes2block() local
223 if (dw->pdata->is_idma32) in bytes2block()
239 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in block2bytes() local
241 if (dw->pdata->is_idma32) in block2bytes()
253 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in dwc_do_single_block() local
266 channel_set_bit(dw, CH_EN, dwc->mask); in dwc_do_single_block()
275 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in dwc_dostart() local
280 if (dma_readl(dw, CH_EN) & dwc->mask) { in dwc_dostart()
315 channel_set_bit(dw, CH_EN, dwc->mask); in dwc_dostart()
361 static void dwc_complete_all(struct dw_dma *dw, struct dw_dma_chan *dwc) in dwc_complete_all() argument
368 if (dma_readl(dw, CH_EN) & dwc->mask) { in dwc_complete_all()
373 dwc_chan_disable(dw, dwc); in dwc_complete_all()
398 static void dwc_scan_descriptors(struct dw_dma *dw, struct dw_dma_chan *dwc) in dwc_scan_descriptors() argument
408 status_xfer = dma_readl(dw, RAW.XFER); in dwc_scan_descriptors()
412 dma_writel(dw, CLEAR.XFER, dwc->mask); in dwc_scan_descriptors()
446 dwc_complete_all(dw, dwc); in dwc_scan_descriptors()
505 dwc_chan_disable(dw, dwc); in dwc_scan_descriptors()
521 static void dwc_handle_error(struct dw_dma *dw, struct dw_dma_chan *dwc) in dwc_handle_error() argument
527 dwc_scan_descriptors(dw, dwc); in dwc_handle_error()
541 dma_writel(dw, CLEAR.ERROR, dwc->mask); in dwc_handle_error()
566 struct dw_dma *dw = (struct dw_dma *)data; in dw_dma_tasklet() local
572 status_xfer = dma_readl(dw, RAW.XFER); in dw_dma_tasklet()
573 status_err = dma_readl(dw, RAW.ERROR); in dw_dma_tasklet()
575 dev_vdbg(dw->dma.dev, "%s: status_err=%x\n", __func__, status_err); in dw_dma_tasklet()
577 for (i = 0; i < dw->dma.chancnt; i++) { in dw_dma_tasklet()
578 dwc = &dw->chan[i]; in dw_dma_tasklet()
580 dev_vdbg(dw->dma.dev, "Cyclic xfer is not implemented\n"); in dw_dma_tasklet()
582 dwc_handle_error(dw, dwc); in dw_dma_tasklet()
584 dwc_scan_descriptors(dw, dwc); in dw_dma_tasklet()
588 channel_set_bit(dw, MASK.XFER, dw->all_chan_mask); in dw_dma_tasklet()
589 channel_set_bit(dw, MASK.ERROR, dw->all_chan_mask); in dw_dma_tasklet()
594 struct dw_dma *dw = dev_id; in dw_dma_interrupt() local
598 if (!dw->in_use) in dw_dma_interrupt()
601 status = dma_readl(dw, STATUS_INT); in dw_dma_interrupt()
602 dev_vdbg(dw->dma.dev, "%s: status=0x%x\n", __func__, status); in dw_dma_interrupt()
612 channel_clear_bit(dw, MASK.XFER, dw->all_chan_mask); in dw_dma_interrupt()
613 channel_clear_bit(dw, MASK.BLOCK, dw->all_chan_mask); in dw_dma_interrupt()
614 channel_clear_bit(dw, MASK.ERROR, dw->all_chan_mask); in dw_dma_interrupt()
616 status = dma_readl(dw, STATUS_INT); in dw_dma_interrupt()
618 dev_err(dw->dma.dev, in dw_dma_interrupt()
623 channel_clear_bit(dw, MASK.XFER, (1 << 8) - 1); in dw_dma_interrupt()
624 channel_clear_bit(dw, MASK.BLOCK, (1 << 8) - 1); in dw_dma_interrupt()
625 channel_clear_bit(dw, MASK.SRC_TRAN, (1 << 8) - 1); in dw_dma_interrupt()
626 channel_clear_bit(dw, MASK.DST_TRAN, (1 << 8) - 1); in dw_dma_interrupt()
627 channel_clear_bit(dw, MASK.ERROR, (1 << 8) - 1); in dw_dma_interrupt()
630 tasklet_schedule(&dw->tasklet); in dw_dma_interrupt()
642 struct dw_dma *dw = to_dw_dma(chan->device); in dwc_prep_dma_memcpy() local
651 unsigned int data_width = dw->pdata->data_width[m_master]; in dwc_prep_dma_memcpy()
718 struct dw_dma *dw = to_dw_dma(chan->device); in dwc_prep_slave_sg() local
728 unsigned int data_width = dw->pdata->data_width[m_master]; in dwc_prep_slave_sg()
878 struct dw_dma *dw = to_dw_dma(chan->device); in dwc_config() local
887 u32 s = dw->pdata->is_idma32 ? 1 : 2; in dwc_config()
904 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in dwc_chan_pause() local
909 if (dw->pdata->is_idma32) { in dwc_chan_pause()
961 struct dw_dma *dw = to_dw_dma(chan->device); in dwc_terminate_all() local
972 dwc_chan_disable(dw, dwc); in dwc_terminate_all()
1070 static void idma32_fifo_partition(struct dw_dma *dw) in idma32_fifo_partition() argument
1076 if (!dw->pdata->is_idma32) in idma32_fifo_partition()
1086 idma32_writeq(dw, FIFO_PARTITION1, fifo_partition); in idma32_fifo_partition()
1087 idma32_writeq(dw, FIFO_PARTITION0, fifo_partition); in idma32_fifo_partition()
1090 static void dw_dma_off(struct dw_dma *dw) in dw_dma_off() argument
1094 dma_writel(dw, CFG, 0); in dw_dma_off()
1096 channel_clear_bit(dw, MASK.XFER, dw->all_chan_mask); in dw_dma_off()
1097 channel_clear_bit(dw, MASK.BLOCK, dw->all_chan_mask); in dw_dma_off()
1098 channel_clear_bit(dw, MASK.SRC_TRAN, dw->all_chan_mask); in dw_dma_off()
1099 channel_clear_bit(dw, MASK.DST_TRAN, dw->all_chan_mask); in dw_dma_off()
1100 channel_clear_bit(dw, MASK.ERROR, dw->all_chan_mask); in dw_dma_off()
1102 while (dma_readl(dw, CFG) & DW_CFG_DMA_EN) in dw_dma_off()
1105 for (i = 0; i < dw->dma.chancnt; i++) in dw_dma_off()
1106 clear_bit(DW_DMA_IS_INITIALIZED, &dw->chan[i].flags); in dw_dma_off()
1109 static void dw_dma_on(struct dw_dma *dw) in dw_dma_on() argument
1111 dma_writel(dw, CFG, DW_CFG_DMA_EN); in dw_dma_on()
1117 struct dw_dma *dw = to_dw_dma(chan->device); in dwc_alloc_chan_resources() local
1122 if (dma_readl(dw, CH_EN) & dwc->mask) { in dwc_alloc_chan_resources()
1144 if (!dw->in_use) in dwc_alloc_chan_resources()
1145 dw_dma_on(dw); in dwc_alloc_chan_resources()
1146 dw->in_use |= dwc->mask; in dwc_alloc_chan_resources()
1154 struct dw_dma *dw = to_dw_dma(chan->device); in dwc_free_chan_resources() local
1174 channel_clear_bit(dw, MASK.XFER, dwc->mask); in dwc_free_chan_resources()
1175 channel_clear_bit(dw, MASK.BLOCK, dwc->mask); in dwc_free_chan_resources()
1176 channel_clear_bit(dw, MASK.ERROR, dwc->mask); in dwc_free_chan_resources()
1181 dw->in_use &= ~dwc->mask; in dwc_free_chan_resources()
1182 if (!dw->in_use) in dwc_free_chan_resources()
1183 dw_dma_off(dw); in dwc_free_chan_resources()
1191 struct dw_dma *dw; in dw_dma_probe() local
1197 dw = devm_kzalloc(chip->dev, sizeof(*dw), GFP_KERNEL); in dw_dma_probe()
1198 if (!dw) in dw_dma_probe()
1201 dw->pdata = devm_kzalloc(chip->dev, sizeof(*dw->pdata), GFP_KERNEL); in dw_dma_probe()
1202 if (!dw->pdata) in dw_dma_probe()
1205 dw->regs = chip->regs; in dw_dma_probe()
1206 chip->dw = dw; in dw_dma_probe()
1211 dw_params = dma_readl(dw, DW_PARAMS); in dw_dma_probe()
1221 pdata = dw->pdata; in dw_dma_probe()
1230 pdata->block_size = dma_readl(dw, MAX_BLK_SIZE); in dw_dma_probe()
1241 memcpy(dw->pdata, chip->pdata, sizeof(*dw->pdata)); in dw_dma_probe()
1244 pdata = dw->pdata; in dw_dma_probe()
1247 dw->chan = devm_kcalloc(chip->dev, pdata->nr_channels, sizeof(*dw->chan), in dw_dma_probe()
1249 if (!dw->chan) { in dw_dma_probe()
1255 dw->all_chan_mask = (1 << pdata->nr_channels) - 1; in dw_dma_probe()
1258 dw_dma_off(dw); in dw_dma_probe()
1260 idma32_fifo_partition(dw); in dw_dma_probe()
1264 snprintf(dw->name, sizeof(dw->name), "idma32:dmac%d", chip->id); in dw_dma_probe()
1266 snprintf(dw->name, sizeof(dw->name), "dw:dmac%d", chip->id); in dw_dma_probe()
1269 dw->desc_pool = dmam_pool_create(dw->name, chip->dev, in dw_dma_probe()
1271 if (!dw->desc_pool) { in dw_dma_probe()
1277 tasklet_init(&dw->tasklet, dw_dma_tasklet, (unsigned long)dw); in dw_dma_probe()
1280 dw->name, dw); in dw_dma_probe()
1284 INIT_LIST_HEAD(&dw->dma.channels); in dw_dma_probe()
1286 struct dw_dma_chan *dwc = &dw->chan[i]; in dw_dma_probe()
1288 dwc->chan.device = &dw->dma; in dw_dma_probe()
1292 &dw->dma.channels); in dw_dma_probe()
1294 list_add(&dwc->chan.device_node, &dw->dma.channels); in dw_dma_probe()
1302 dwc->ch_regs = &__dw_regs(dw)->CHAN[i]; in dw_dma_probe()
1309 channel_clear_bit(dw, CH_EN, dwc->mask); in dw_dma_probe()
1316 void __iomem *addr = &__dw_regs(dw)->DWC_PARAMS[r]; in dw_dma_probe()
1338 dma_writel(dw, CLEAR.XFER, dw->all_chan_mask); in dw_dma_probe()
1339 dma_writel(dw, CLEAR.BLOCK, dw->all_chan_mask); in dw_dma_probe()
1340 dma_writel(dw, CLEAR.SRC_TRAN, dw->all_chan_mask); in dw_dma_probe()
1341 dma_writel(dw, CLEAR.DST_TRAN, dw->all_chan_mask); in dw_dma_probe()
1342 dma_writel(dw, CLEAR.ERROR, dw->all_chan_mask); in dw_dma_probe()
1345 dma_cap_set(DMA_SLAVE, dw->dma.cap_mask); in dw_dma_probe()
1347 dma_cap_set(DMA_PRIVATE, dw->dma.cap_mask); in dw_dma_probe()
1349 dma_cap_set(DMA_MEMCPY, dw->dma.cap_mask); in dw_dma_probe()
1351 dw->dma.dev = chip->dev; in dw_dma_probe()
1352 dw->dma.device_alloc_chan_resources = dwc_alloc_chan_resources; in dw_dma_probe()
1353 dw->dma.device_free_chan_resources = dwc_free_chan_resources; in dw_dma_probe()
1355 dw->dma.device_prep_dma_memcpy = dwc_prep_dma_memcpy; in dw_dma_probe()
1356 dw->dma.device_prep_slave_sg = dwc_prep_slave_sg; in dw_dma_probe()
1358 dw->dma.device_config = dwc_config; in dw_dma_probe()
1359 dw->dma.device_pause = dwc_pause; in dw_dma_probe()
1360 dw->dma.device_resume = dwc_resume; in dw_dma_probe()
1361 dw->dma.device_terminate_all = dwc_terminate_all; in dw_dma_probe()
1363 dw->dma.device_tx_status = dwc_tx_status; in dw_dma_probe()
1364 dw->dma.device_issue_pending = dwc_issue_pending; in dw_dma_probe()
1367 dw->dma.src_addr_widths = DW_DMA_BUSWIDTHS; in dw_dma_probe()
1368 dw->dma.dst_addr_widths = DW_DMA_BUSWIDTHS; in dw_dma_probe()
1369 dw->dma.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV) | in dw_dma_probe()
1371 dw->dma.residue_granularity = DMA_RESIDUE_GRANULARITY_BURST; in dw_dma_probe()
1373 err = dma_async_device_register(&dw->dma); in dw_dma_probe()
1385 free_irq(chip->irq, dw); in dw_dma_probe()
1394 struct dw_dma *dw = chip->dw; in dw_dma_remove() local
1399 dw_dma_off(dw); in dw_dma_remove()
1400 dma_async_device_unregister(&dw->dma); in dw_dma_remove()
1402 free_irq(chip->irq, dw); in dw_dma_remove()
1403 tasklet_kill(&dw->tasklet); in dw_dma_remove()
1405 list_for_each_entry_safe(dwc, _dwc, &dw->dma.channels, in dw_dma_remove()
1408 channel_clear_bit(dw, CH_EN, dwc->mask); in dw_dma_remove()
1418 struct dw_dma *dw = chip->dw; in dw_dma_disable() local
1420 dw_dma_off(dw); in dw_dma_disable()
1427 struct dw_dma *dw = chip->dw; in dw_dma_enable() local
1429 idma32_fifo_partition(dw); in dw_dma_enable()
1431 dw_dma_on(dw); in dw_dma_enable()