144 	u32 cfglo = 0;  in dwc_initialize_chan_idma32()  local
147 	cfglo |= IDMA32C_CFGL_DST_BURST_ALIGN | IDMA32C_CFGL_SRC_BURST_ALIGN;  in dwc_initialize_chan_idma32()
157 	channel_writel(dwc, CFG_LO, cfglo);  in dwc_initialize_chan_idma32()
164 	u32 cfglo = DWC_CFGL_CH_PRIOR(dwc->priority);  in dwc_initialize_chan_dw()  local
171 	cfglo |= hs_polarity ? DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL : 0;  in dwc_initialize_chan_dw()
173 	channel_writel(dwc, CFG_LO, cfglo);  in dwc_initialize_chan_dw()
906 	u32			cfglo;  in dwc_chan_pause()  local
908 	cfglo = channel_readl(dwc, CFG_LO);  in dwc_chan_pause()
911 			cfglo |= IDMA32C_CFGL_CH_DRAIN;  in dwc_chan_pause()
913 			cfglo &= ~IDMA32C_CFGL_CH_DRAIN;  in dwc_chan_pause()
915 	channel_writel(dwc, CFG_LO, cfglo | DWC_CFGL_CH_SUSP);  in dwc_chan_pause()
936 	u32 cfglo = channel_readl(dwc, CFG_LO);  in dwc_chan_resume()  local
938 	channel_writel(dwc, CFG_LO, cfglo & ~DWC_CFGL_CH_SUSP);  in dwc_chan_resume()