246 	struct at_xdmac_lld		lld;  member
364 	else if (first->lld.mbr_ubc & AT_XDMAC_MBR_UBC_NDV3)  in at_xdmac_start_xfer()
374 	at_xdmac_chan_write(atchan, AT_XDMAC_CC, first->lld.mbr_cfg);  in at_xdmac_start_xfer()
459 	memset(&desc->lld, 0, sizeof(desc->lld));  in at_xdmac_init_used_desc()
490 	prev->lld.mbr_nda = desc->tx_dma_desc.phys;  in at_xdmac_queue_desc()
491 	prev->lld.mbr_ubc |= AT_XDMAC_MBR_UBC_NDE;  in at_xdmac_queue_desc()
494 		__func__, prev, &prev->lld.mbr_nda);  in at_xdmac_queue_desc()
503 	desc->lld.mbr_bc++;  in at_xdmac_increment_block_count()
687 			desc->lld.mbr_sa = atchan->sconfig.src_addr;  in at_xdmac_prep_slave_sg()
688 			desc->lld.mbr_da = mem;  in at_xdmac_prep_slave_sg()
690 			desc->lld.mbr_sa = mem;  in at_xdmac_prep_slave_sg()
691 			desc->lld.mbr_da = atchan->sconfig.dst_addr;  in at_xdmac_prep_slave_sg()
697 		desc->lld.mbr_ubc = AT_XDMAC_MBR_UBC_NDV2			/* next descriptor view */  in at_xdmac_prep_slave_sg()
701 		desc->lld.mbr_cfg = (atchan->cfg & ~AT_XDMAC_CC_DWIDTH_MASK) |  in at_xdmac_prep_slave_sg()
705 			 __func__, &desc->lld.mbr_sa, &desc->lld.mbr_da, desc->lld.mbr_ubc);  in at_xdmac_prep_slave_sg()
779 			desc->lld.mbr_sa = atchan->sconfig.src_addr;  in at_xdmac_prep_dma_cyclic()
780 			desc->lld.mbr_da = buf_addr + i * period_len;  in at_xdmac_prep_dma_cyclic()
782 			desc->lld.mbr_sa = buf_addr + i * period_len;  in at_xdmac_prep_dma_cyclic()
783 			desc->lld.mbr_da = atchan->sconfig.dst_addr;  in at_xdmac_prep_dma_cyclic()
785 		desc->lld.mbr_cfg = atchan->cfg;  in at_xdmac_prep_dma_cyclic()
786 		desc->lld.mbr_ubc = AT_XDMAC_MBR_UBC_NDV1  in at_xdmac_prep_dma_cyclic()
789 			| period_len >> at_xdmac_get_dwidth(desc->lld.mbr_cfg);  in at_xdmac_prep_dma_cyclic()
793 			 __func__, &desc->lld.mbr_sa, &desc->lld.mbr_da, desc->lld.mbr_ubc);  in at_xdmac_prep_dma_cyclic()
914 	desc->lld.mbr_sa = src;  in at_xdmac_interleaved_queue_desc()
915 	desc->lld.mbr_da = dst;  in at_xdmac_interleaved_queue_desc()
916 	desc->lld.mbr_sus = dmaengine_get_src_icg(xt, chunk);  in at_xdmac_interleaved_queue_desc()
917 	desc->lld.mbr_dus = dmaengine_get_dst_icg(xt, chunk);  in at_xdmac_interleaved_queue_desc()
919 	desc->lld.mbr_ubc = AT_XDMAC_MBR_UBC_NDV3  in at_xdmac_interleaved_queue_desc()
923 	desc->lld.mbr_cfg = chan_cc;  in at_xdmac_interleaved_queue_desc()
927 		__func__, &desc->lld.mbr_sa, &desc->lld.mbr_da,  in at_xdmac_interleaved_queue_desc()
928 		desc->lld.mbr_ubc, desc->lld.mbr_cfg);  in at_xdmac_interleaved_queue_desc()
1104 		desc->lld.mbr_sa = src_addr;  in at_xdmac_prep_dma_memcpy()
1105 		desc->lld.mbr_da = dst_addr;  in at_xdmac_prep_dma_memcpy()
1106 		desc->lld.mbr_ubc = AT_XDMAC_MBR_UBC_NDV2  in at_xdmac_prep_dma_memcpy()
1110 		desc->lld.mbr_cfg = chan_cc;  in at_xdmac_prep_dma_memcpy()
1114 			 __func__, &desc->lld.mbr_sa, &desc->lld.mbr_da, desc->lld.mbr_ubc, desc->lld.mbr_cfg);  in at_xdmac_prep_dma_memcpy()
1187 	desc->lld.mbr_da = dst_addr;  in at_xdmac_memset_create_desc()
1188 	desc->lld.mbr_ds = value;  in at_xdmac_memset_create_desc()
1189 	desc->lld.mbr_ubc = AT_XDMAC_MBR_UBC_NDV3  in at_xdmac_memset_create_desc()
1193 	desc->lld.mbr_cfg = chan_cc;  in at_xdmac_memset_create_desc()
1197 		__func__, &desc->lld.mbr_da, desc->lld.mbr_ds, desc->lld.mbr_ubc,  in at_xdmac_memset_create_desc()
1198 		desc->lld.mbr_cfg);  in at_xdmac_memset_create_desc()
1297 				ppdesc->lld.mbr_dus = stride;  in at_xdmac_prep_dma_memset_sg()
1360 			pdesc->lld.mbr_dus = stride;  in at_xdmac_prep_dma_memset_sg()
1439 	if ((desc->lld.mbr_cfg & mask) == value) {  in at_xdmac_tx_status()
1497 	if ((desc->lld.mbr_cfg & mask) == value) {  in at_xdmac_tx_status()
1510 		dwidth = at_xdmac_get_dwidth(desc->lld.mbr_cfg);  in at_xdmac_tx_status()
1511 		residue -= (desc->lld.mbr_ubc & 0xffffff) << dwidth;  in at_xdmac_tx_status()
1512 		if ((desc->lld.mbr_nda & 0xfffffffc) == cur_nda)  in at_xdmac_tx_status()