216 	u32 cctl;  member
970 			u32 cctl,  in pl08x_get_bytes_for_lli()  argument
977 			val = (cctl & FTDMAC020_LLI_SRC_WIDTH_MSK) >>  in pl08x_get_bytes_for_lli()
980 			val = (cctl & FTDMAC020_LLI_DST_WIDTH_MSK) >>  in pl08x_get_bytes_for_lli()
984 			val = (cctl & PL080_CONTROL_SWIDTH_MASK) >>  in pl08x_get_bytes_for_lli()
987 			val = (cctl & PL080_CONTROL_DWIDTH_MASK) >>  in pl08x_get_bytes_for_lli()
1006 					 u32 cctl,  in pl08x_lli_control_bits()  argument
1010 	u32 retbits = cctl;  in pl08x_lli_control_bits()
1129 				    u32 cctl)  in pl08x_choose_master_bus()  argument
1142 		dst_incr = !!(cctl & PL080_CONTROL_DST_INCR);  in pl08x_choose_master_bus()
1143 		src_incr = !!(cctl & PL080_CONTROL_SRC_INCR);  in pl08x_choose_master_bus()
1172 				    int num_llis, int len, u32 cctl, u32 cctl2)  in pl08x_fill_lli_for_desc()  argument
1187 	llis_va[PL080_LLI_CCTL] = cctl;  in pl08x_fill_lli_for_desc()
1196 		if (cctl & PL080_CONTROL_SRC_INCR)  in pl08x_fill_lli_for_desc()
1198 		if (cctl & PL080_CONTROL_DST_INCR)  in pl08x_fill_lli_for_desc()
1208 			struct pl08x_lli_build_data *bd, u32 *cctl, u32 len,  in prep_byte_width_lli()  argument
1211 	*cctl = pl08x_lli_control_bits(pl08x, *cctl, 1, 1, len);  in prep_byte_width_lli()
1212 	pl08x_fill_lli_for_desc(pl08x, bd, num_llis, len, *cctl, len);  in prep_byte_width_lli()
1265 	u32 cctl, early_bytes = 0;  in pl08x_fill_llis_for_desc()  local
1278 	cctl = txd->cctl;  in pl08x_fill_llis_for_desc()
1281 	bd.srcbus.maxwidth = pl08x_get_bytes_for_lli(pl08x, cctl, true);  in pl08x_fill_llis_for_desc()
1284 	bd.dstbus.maxwidth = pl08x_get_bytes_for_lli(pl08x, cctl, false);  in pl08x_fill_llis_for_desc()
1288 		cctl = txd->cctl;  in pl08x_fill_llis_for_desc()
1296 		pl08x_choose_master_bus(pl08x, &bd, &mbus, &sbus, cctl);  in pl08x_fill_llis_for_desc()
1301 			cctl & PL080_CONTROL_SRC_INCR ? "+" : "",  in pl08x_fill_llis_for_desc()
1304 			cctl & PL080_CONTROL_DST_INCR ? "+" : "",  in pl08x_fill_llis_for_desc()
1357 			cctl = pl08x_lli_control_bits(pl08x, cctl,  in pl08x_fill_llis_for_desc()
1361 					0, cctl, 0);  in pl08x_fill_llis_for_desc()
1383 			prep_byte_width_lli(pl08x, &bd, &cctl, early_bytes,  in pl08x_fill_llis_for_desc()
1438 				cctl = pl08x_lli_control_bits(pl08x, cctl,  in pl08x_fill_llis_for_desc()
1442 						lli_len, cctl, tsize);  in pl08x_fill_llis_for_desc()
1453 				prep_byte_width_lli(pl08x, &bd, &cctl,  in pl08x_fill_llis_for_desc()
1654 	u32 cctl = 0;  in pl08x_select_bus()  local
1668 		cctl |= dst_ahb2;  in pl08x_select_bus()
1670 		cctl |= src_ahb2;  in pl08x_select_bus()
1672 	return cctl;  in pl08x_select_bus()
1675 static u32 pl08x_cctl(u32 cctl)  in pl08x_cctl()  argument
1677 	cctl &= ~(PL080_CONTROL_SRC_AHB2 | PL080_CONTROL_DST_AHB2 |  in pl08x_cctl()
1682 	return cctl | PL080_CONTROL_PROT_SYS;  in pl08x_cctl()
1713 	u32 width, burst, cctl = 0;  in pl08x_get_cctl()  local
1719 	cctl |= width << PL080_CONTROL_SWIDTH_SHIFT;  in pl08x_get_cctl()
1720 	cctl |= width << PL080_CONTROL_DWIDTH_SHIFT;  in pl08x_get_cctl()
1731 	cctl |= burst << PL080_CONTROL_SB_SIZE_SHIFT;  in pl08x_get_cctl()
1732 	cctl |= burst << PL080_CONTROL_DB_SIZE_SHIFT;  in pl08x_get_cctl()
1734 	return pl08x_cctl(cctl);  in pl08x_get_cctl()
1765 	u32 cctl = 0;  in pl08x_memcpy_cctl()  local
1774 		cctl |= PL080_BSIZE_1 << PL080_CONTROL_SB_SIZE_SHIFT |  in pl08x_memcpy_cctl()
1778 		cctl |= PL080_BSIZE_4 << PL080_CONTROL_SB_SIZE_SHIFT |  in pl08x_memcpy_cctl()
1782 		cctl |= PL080_BSIZE_8 << PL080_CONTROL_SB_SIZE_SHIFT |  in pl08x_memcpy_cctl()
1786 		cctl |= PL080_BSIZE_16 << PL080_CONTROL_SB_SIZE_SHIFT |  in pl08x_memcpy_cctl()
1790 		cctl |= PL080_BSIZE_32 << PL080_CONTROL_SB_SIZE_SHIFT |  in pl08x_memcpy_cctl()
1794 		cctl |= PL080_BSIZE_64 << PL080_CONTROL_SB_SIZE_SHIFT |  in pl08x_memcpy_cctl()
1798 		cctl |= PL080_BSIZE_128 << PL080_CONTROL_SB_SIZE_SHIFT |  in pl08x_memcpy_cctl()
1802 		cctl |= PL080_BSIZE_256 << PL080_CONTROL_SB_SIZE_SHIFT |  in pl08x_memcpy_cctl()
1813 		cctl |= PL080_WIDTH_8BIT << PL080_CONTROL_SWIDTH_SHIFT |  in pl08x_memcpy_cctl()
1817 		cctl |= PL080_WIDTH_16BIT << PL080_CONTROL_SWIDTH_SHIFT |  in pl08x_memcpy_cctl()
1821 		cctl |= PL080_WIDTH_32BIT << PL080_CONTROL_SWIDTH_SHIFT |  in pl08x_memcpy_cctl()
1828 		cctl |= PL080_CONTROL_PROT_BUFF;  in pl08x_memcpy_cctl()
1830 		cctl |= PL080_CONTROL_PROT_CACHE;  in pl08x_memcpy_cctl()
1833 	cctl |= PL080_CONTROL_PROT_SYS;  in pl08x_memcpy_cctl()
1836 	cctl |= PL080_CONTROL_SRC_INCR | PL080_CONTROL_DST_INCR;  in pl08x_memcpy_cctl()
1839 		cctl |= pl08x_select_bus(false,  in pl08x_memcpy_cctl()
1843 	return cctl;  in pl08x_memcpy_cctl()
1848 	u32 cctl = 0;  in pl08x_ftdmac020_memcpy_cctl()  local
1857 		cctl |= PL080_WIDTH_8BIT << FTDMAC020_LLI_SRC_WIDTH_SHIFT |  in pl08x_ftdmac020_memcpy_cctl()
1861 		cctl |= PL080_WIDTH_16BIT << FTDMAC020_LLI_SRC_WIDTH_SHIFT |  in pl08x_ftdmac020_memcpy_cctl()
1865 		cctl |= PL080_WIDTH_32BIT << FTDMAC020_LLI_SRC_WIDTH_SHIFT |  in pl08x_ftdmac020_memcpy_cctl()
1874 	cctl |= FTDMAC020_LLI_TC_MSK;  in pl08x_ftdmac020_memcpy_cctl()
1881 		cctl |= pl08x_select_bus(true,  in pl08x_ftdmac020_memcpy_cctl()
1885 	return cctl;  in pl08x_ftdmac020_memcpy_cctl()
1921 		txd->cctl = pl08x_ftdmac020_memcpy_cctl(pl08x);  in pl08x_prep_dma_memcpy()
1926 		txd->cctl = pl08x_memcpy_cctl(pl08x);  in pl08x_prep_dma_memcpy()
1949 	u32 maxburst, cctl;  in pl08x_init_txd()  local
1963 		cctl = PL080_CONTROL_SRC_INCR;  in pl08x_init_txd()
1970 		cctl = PL080_CONTROL_DST_INCR;  in pl08x_init_txd()
1983 	cctl |= pl08x_get_cctl(plchan, addr_width, maxburst);  in pl08x_init_txd()
1984 	if (cctl == ~0) {  in pl08x_init_txd()
1991 	txd->cctl = cctl | pl08x_select_bus(false, src_buses, dst_buses);  in pl08x_init_txd()
2115 	txd->cctl |= PL080_CONTROL_TC_IRQ_EN;  in pl08x_prep_dma_cyclic()