152 	struct atmel_sha_dma	dma_lch_in;  member
650 	dd->dma_lch_in.dma_conf.src_maxburst = 16;  in atmel_sha_xmit_dma()
651 	dd->dma_lch_in.dma_conf.dst_maxburst = 16;  in atmel_sha_xmit_dma()
653 	dmaengine_slave_config(dd->dma_lch_in.chan, &dd->dma_lch_in.dma_conf);  in atmel_sha_xmit_dma()
661 		in_desc = dmaengine_prep_slave_sg(dd->dma_lch_in.chan, sg, 2,  in atmel_sha_xmit_dma()
667 		in_desc = dmaengine_prep_slave_sg(dd->dma_lch_in.chan, sg, 1,  in atmel_sha_xmit_dma()
690 	dma_async_issue_pending(dd->dma_lch_in.chan);  in atmel_sha_xmit_dma()
1461 	struct atmel_sha_dma *dma = &dd->dma_lch_in;  in atmel_sha_dma_check_aligned()
1495 	struct atmel_sha_dma *dma = &dd->dma_lch_in;  in atmel_sha_dma_callback2()
1516 	struct atmel_sha_dma *dma = &dd->dma_lch_in;  in atmel_sha_dma_start()
2635 	dd->dma_lch_in.chan = dma_request_slave_channel_compat(mask_in,  in atmel_sha_dma_init()
2637 	if (!dd->dma_lch_in.chan) {  in atmel_sha_dma_init()
2642 	dd->dma_lch_in.dma_conf.direction = DMA_MEM_TO_DEV;  in atmel_sha_dma_init()
2643 	dd->dma_lch_in.dma_conf.dst_addr = dd->phys_base +  in atmel_sha_dma_init()
2645 	dd->dma_lch_in.dma_conf.src_maxburst = 1;  in atmel_sha_dma_init()
2646 	dd->dma_lch_in.dma_conf.src_addr_width =  in atmel_sha_dma_init()
2648 	dd->dma_lch_in.dma_conf.dst_maxburst = 1;  in atmel_sha_dma_init()
2649 	dd->dma_lch_in.dma_conf.dst_addr_width =  in atmel_sha_dma_init()
2651 	dd->dma_lch_in.dma_conf.device_fc = false;  in atmel_sha_dma_init()
2658 	dma_release_channel(dd->dma_lch_in.chan);  in atmel_sha_dma_cleanup()
2839 				dma_chan_name(sha_dd->dma_lch_in.chan));  in atmel_sha_probe()