Lines Matching refs:timer_of_base
65 #define SYST_CON_REG(to) (timer_of_base(to) + SYST_CON)
66 #define SYST_VAL_REG(to) (timer_of_base(to) + SYST_VAL)
148 val = readl(timer_of_base(to) + GPT_CTRL_REG(timer)); in mtk_gpt_clkevt_time_stop()
149 writel(val & ~GPT_CTRL_ENABLE, timer_of_base(to) + in mtk_gpt_clkevt_time_stop()
156 writel(delay, timer_of_base(to) + GPT_CMP_REG(timer)); in mtk_gpt_clkevt_time_setup()
165 writel(GPT_IRQ_ACK(timer), timer_of_base(to) + GPT_IRQ_ACK_REG); in mtk_gpt_clkevt_time_start()
167 val = readl(timer_of_base(to) + GPT_CTRL_REG(timer)); in mtk_gpt_clkevt_time_start()
178 timer_of_base(to) + GPT_CTRL_REG(timer)); in mtk_gpt_clkevt_time_start()
217 writel(GPT_IRQ_ACK(TIMER_CLK_EVT), timer_of_base(to) + GPT_IRQ_ACK_REG); in mtk_gpt_interrupt()
227 timer_of_base(to) + GPT_CTRL_REG(timer)); in mtk_gpt_setup()
230 timer_of_base(to) + GPT_CLK_REG(timer)); in mtk_gpt_setup()
232 writel(0x0, timer_of_base(to) + GPT_CMP_REG(timer)); in mtk_gpt_setup()
235 timer_of_base(to) + GPT_CTRL_REG(timer)); in mtk_gpt_setup()
243 writel(0x0, timer_of_base(to) + GPT_IRQ_EN_REG); in mtk_gpt_enable_irq()
246 writel(0x3f, timer_of_base(to) + GPT_IRQ_ACK_REG); in mtk_gpt_enable_irq()
248 val = readl(timer_of_base(to) + GPT_IRQ_EN_REG); in mtk_gpt_enable_irq()
250 timer_of_base(to) + GPT_IRQ_EN_REG); in mtk_gpt_enable_irq()
309 clocksource_mmio_init(timer_of_base(&to) + GPT_CNT_REG(TIMER_CLK_SRC), in mtk_gpt_init()
312 gpt_sched_reg = timer_of_base(&to) + GPT_CNT_REG(TIMER_CLK_SRC); in mtk_gpt_init()