Lines Matching refs:ch
245 static inline unsigned long sh_cmt_read_cmstr(struct sh_cmt_channel *ch) in sh_cmt_read_cmstr() argument
247 if (ch->iostart) in sh_cmt_read_cmstr()
248 return ch->cmt->info->read_control(ch->iostart, 0); in sh_cmt_read_cmstr()
250 return ch->cmt->info->read_control(ch->cmt->mapbase, 0); in sh_cmt_read_cmstr()
253 static inline void sh_cmt_write_cmstr(struct sh_cmt_channel *ch, in sh_cmt_write_cmstr() argument
256 if (ch->iostart) in sh_cmt_write_cmstr()
257 ch->cmt->info->write_control(ch->iostart, 0, value); in sh_cmt_write_cmstr()
259 ch->cmt->info->write_control(ch->cmt->mapbase, 0, value); in sh_cmt_write_cmstr()
262 static inline unsigned long sh_cmt_read_cmcsr(struct sh_cmt_channel *ch) in sh_cmt_read_cmcsr() argument
264 return ch->cmt->info->read_control(ch->ioctrl, CMCSR); in sh_cmt_read_cmcsr()
267 static inline void sh_cmt_write_cmcsr(struct sh_cmt_channel *ch, in sh_cmt_write_cmcsr() argument
270 ch->cmt->info->write_control(ch->ioctrl, CMCSR, value); in sh_cmt_write_cmcsr()
273 static inline unsigned long sh_cmt_read_cmcnt(struct sh_cmt_channel *ch) in sh_cmt_read_cmcnt() argument
275 return ch->cmt->info->read_count(ch->ioctrl, CMCNT); in sh_cmt_read_cmcnt()
278 static inline void sh_cmt_write_cmcnt(struct sh_cmt_channel *ch, in sh_cmt_write_cmcnt() argument
281 ch->cmt->info->write_count(ch->ioctrl, CMCNT, value); in sh_cmt_write_cmcnt()
284 static inline void sh_cmt_write_cmcor(struct sh_cmt_channel *ch, in sh_cmt_write_cmcor() argument
287 ch->cmt->info->write_count(ch->ioctrl, CMCOR, value); in sh_cmt_write_cmcor()
290 static unsigned long sh_cmt_get_counter(struct sh_cmt_channel *ch, in sh_cmt_get_counter() argument
296 o1 = sh_cmt_read_cmcsr(ch) & ch->cmt->info->overflow_bit; in sh_cmt_get_counter()
301 v1 = sh_cmt_read_cmcnt(ch); in sh_cmt_get_counter()
302 v2 = sh_cmt_read_cmcnt(ch); in sh_cmt_get_counter()
303 v3 = sh_cmt_read_cmcnt(ch); in sh_cmt_get_counter()
304 o1 = sh_cmt_read_cmcsr(ch) & ch->cmt->info->overflow_bit; in sh_cmt_get_counter()
312 static void sh_cmt_start_stop_ch(struct sh_cmt_channel *ch, int start) in sh_cmt_start_stop_ch() argument
317 raw_spin_lock_irqsave(&ch->cmt->lock, flags); in sh_cmt_start_stop_ch()
318 value = sh_cmt_read_cmstr(ch); in sh_cmt_start_stop_ch()
321 value |= 1 << ch->timer_bit; in sh_cmt_start_stop_ch()
323 value &= ~(1 << ch->timer_bit); in sh_cmt_start_stop_ch()
325 sh_cmt_write_cmstr(ch, value); in sh_cmt_start_stop_ch()
326 raw_spin_unlock_irqrestore(&ch->cmt->lock, flags); in sh_cmt_start_stop_ch()
329 static int sh_cmt_enable(struct sh_cmt_channel *ch) in sh_cmt_enable() argument
333 pm_runtime_get_sync(&ch->cmt->pdev->dev); in sh_cmt_enable()
334 dev_pm_syscore_device(&ch->cmt->pdev->dev, true); in sh_cmt_enable()
337 ret = clk_enable(ch->cmt->clk); in sh_cmt_enable()
339 dev_err(&ch->cmt->pdev->dev, "ch%u: cannot enable clock\n", in sh_cmt_enable()
340 ch->index); in sh_cmt_enable()
345 sh_cmt_start_stop_ch(ch, 0); in sh_cmt_enable()
348 if (ch->cmt->info->width == 16) { in sh_cmt_enable()
349 sh_cmt_write_cmcsr(ch, SH_CMT16_CMCSR_CMIE | in sh_cmt_enable()
352 sh_cmt_write_cmcsr(ch, SH_CMT32_CMCSR_CMM | in sh_cmt_enable()
358 sh_cmt_write_cmcor(ch, 0xffffffff); in sh_cmt_enable()
359 sh_cmt_write_cmcnt(ch, 0); in sh_cmt_enable()
373 if (!sh_cmt_read_cmcnt(ch)) in sh_cmt_enable()
378 if (sh_cmt_read_cmcnt(ch)) { in sh_cmt_enable()
379 dev_err(&ch->cmt->pdev->dev, "ch%u: cannot clear CMCNT\n", in sh_cmt_enable()
380 ch->index); in sh_cmt_enable()
386 sh_cmt_start_stop_ch(ch, 1); in sh_cmt_enable()
390 clk_disable(ch->cmt->clk); in sh_cmt_enable()
396 static void sh_cmt_disable(struct sh_cmt_channel *ch) in sh_cmt_disable() argument
399 sh_cmt_start_stop_ch(ch, 0); in sh_cmt_disable()
402 sh_cmt_write_cmcsr(ch, 0); in sh_cmt_disable()
405 clk_disable(ch->cmt->clk); in sh_cmt_disable()
407 dev_pm_syscore_device(&ch->cmt->pdev->dev, false); in sh_cmt_disable()
408 pm_runtime_put(&ch->cmt->pdev->dev); in sh_cmt_disable()
418 static void sh_cmt_clock_event_program_verify(struct sh_cmt_channel *ch, in sh_cmt_clock_event_program_verify() argument
422 unsigned long value = ch->next_match_value; in sh_cmt_clock_event_program_verify()
427 now = sh_cmt_get_counter(ch, &has_wrapped); in sh_cmt_clock_event_program_verify()
428 ch->flags |= FLAG_REPROGRAM; /* force reprogram */ in sh_cmt_clock_event_program_verify()
435 ch->flags |= FLAG_SKIPEVENT; in sh_cmt_clock_event_program_verify()
447 if (new_match > ch->max_match_value) in sh_cmt_clock_event_program_verify()
448 new_match = ch->max_match_value; in sh_cmt_clock_event_program_verify()
450 sh_cmt_write_cmcor(ch, new_match); in sh_cmt_clock_event_program_verify()
452 now = sh_cmt_get_counter(ch, &has_wrapped); in sh_cmt_clock_event_program_verify()
453 if (has_wrapped && (new_match > ch->match_value)) { in sh_cmt_clock_event_program_verify()
460 ch->flags |= FLAG_SKIPEVENT; in sh_cmt_clock_event_program_verify()
471 ch->match_value = new_match; in sh_cmt_clock_event_program_verify()
482 ch->match_value = new_match; in sh_cmt_clock_event_program_verify()
498 dev_warn(&ch->cmt->pdev->dev, "ch%u: too long delay\n", in sh_cmt_clock_event_program_verify()
499 ch->index); in sh_cmt_clock_event_program_verify()
504 static void __sh_cmt_set_next(struct sh_cmt_channel *ch, unsigned long delta) in __sh_cmt_set_next() argument
506 if (delta > ch->max_match_value) in __sh_cmt_set_next()
507 dev_warn(&ch->cmt->pdev->dev, "ch%u: delta out of range\n", in __sh_cmt_set_next()
508 ch->index); in __sh_cmt_set_next()
510 ch->next_match_value = delta; in __sh_cmt_set_next()
511 sh_cmt_clock_event_program_verify(ch, 0); in __sh_cmt_set_next()
514 static void sh_cmt_set_next(struct sh_cmt_channel *ch, unsigned long delta) in sh_cmt_set_next() argument
518 raw_spin_lock_irqsave(&ch->lock, flags); in sh_cmt_set_next()
519 __sh_cmt_set_next(ch, delta); in sh_cmt_set_next()
520 raw_spin_unlock_irqrestore(&ch->lock, flags); in sh_cmt_set_next()
525 struct sh_cmt_channel *ch = dev_id; in sh_cmt_interrupt() local
528 sh_cmt_write_cmcsr(ch, sh_cmt_read_cmcsr(ch) & in sh_cmt_interrupt()
529 ch->cmt->info->clear_bits); in sh_cmt_interrupt()
535 if (ch->flags & FLAG_CLOCKSOURCE) in sh_cmt_interrupt()
536 ch->total_cycles += ch->match_value + 1; in sh_cmt_interrupt()
538 if (!(ch->flags & FLAG_REPROGRAM)) in sh_cmt_interrupt()
539 ch->next_match_value = ch->max_match_value; in sh_cmt_interrupt()
541 ch->flags |= FLAG_IRQCONTEXT; in sh_cmt_interrupt()
543 if (ch->flags & FLAG_CLOCKEVENT) { in sh_cmt_interrupt()
544 if (!(ch->flags & FLAG_SKIPEVENT)) { in sh_cmt_interrupt()
545 if (clockevent_state_oneshot(&ch->ced)) { in sh_cmt_interrupt()
546 ch->next_match_value = ch->max_match_value; in sh_cmt_interrupt()
547 ch->flags |= FLAG_REPROGRAM; in sh_cmt_interrupt()
550 ch->ced.event_handler(&ch->ced); in sh_cmt_interrupt()
554 ch->flags &= ~FLAG_SKIPEVENT; in sh_cmt_interrupt()
556 if (ch->flags & FLAG_REPROGRAM) { in sh_cmt_interrupt()
557 ch->flags &= ~FLAG_REPROGRAM; in sh_cmt_interrupt()
558 sh_cmt_clock_event_program_verify(ch, 1); in sh_cmt_interrupt()
560 if (ch->flags & FLAG_CLOCKEVENT) in sh_cmt_interrupt()
561 if ((clockevent_state_shutdown(&ch->ced)) in sh_cmt_interrupt()
562 || (ch->match_value == ch->next_match_value)) in sh_cmt_interrupt()
563 ch->flags &= ~FLAG_REPROGRAM; in sh_cmt_interrupt()
566 ch->flags &= ~FLAG_IRQCONTEXT; in sh_cmt_interrupt()
571 static int sh_cmt_start(struct sh_cmt_channel *ch, unsigned long flag) in sh_cmt_start() argument
576 raw_spin_lock_irqsave(&ch->lock, flags); in sh_cmt_start()
578 if (!(ch->flags & (FLAG_CLOCKEVENT | FLAG_CLOCKSOURCE))) in sh_cmt_start()
579 ret = sh_cmt_enable(ch); in sh_cmt_start()
583 ch->flags |= flag; in sh_cmt_start()
586 if ((flag == FLAG_CLOCKSOURCE) && (!(ch->flags & FLAG_CLOCKEVENT))) in sh_cmt_start()
587 __sh_cmt_set_next(ch, ch->max_match_value); in sh_cmt_start()
589 raw_spin_unlock_irqrestore(&ch->lock, flags); in sh_cmt_start()
594 static void sh_cmt_stop(struct sh_cmt_channel *ch, unsigned long flag) in sh_cmt_stop() argument
599 raw_spin_lock_irqsave(&ch->lock, flags); in sh_cmt_stop()
601 f = ch->flags & (FLAG_CLOCKEVENT | FLAG_CLOCKSOURCE); in sh_cmt_stop()
602 ch->flags &= ~flag; in sh_cmt_stop()
604 if (f && !(ch->flags & (FLAG_CLOCKEVENT | FLAG_CLOCKSOURCE))) in sh_cmt_stop()
605 sh_cmt_disable(ch); in sh_cmt_stop()
608 if ((flag == FLAG_CLOCKEVENT) && (ch->flags & FLAG_CLOCKSOURCE)) in sh_cmt_stop()
609 __sh_cmt_set_next(ch, ch->max_match_value); in sh_cmt_stop()
611 raw_spin_unlock_irqrestore(&ch->lock, flags); in sh_cmt_stop()
621 struct sh_cmt_channel *ch = cs_to_sh_cmt(cs); in sh_cmt_clocksource_read() local
626 raw_spin_lock_irqsave(&ch->lock, flags); in sh_cmt_clocksource_read()
627 value = ch->total_cycles; in sh_cmt_clocksource_read()
628 raw = sh_cmt_get_counter(ch, &has_wrapped); in sh_cmt_clocksource_read()
631 raw += ch->match_value + 1; in sh_cmt_clocksource_read()
632 raw_spin_unlock_irqrestore(&ch->lock, flags); in sh_cmt_clocksource_read()
640 struct sh_cmt_channel *ch = cs_to_sh_cmt(cs); in sh_cmt_clocksource_enable() local
642 WARN_ON(ch->cs_enabled); in sh_cmt_clocksource_enable()
644 ch->total_cycles = 0; in sh_cmt_clocksource_enable()
646 ret = sh_cmt_start(ch, FLAG_CLOCKSOURCE); in sh_cmt_clocksource_enable()
648 ch->cs_enabled = true; in sh_cmt_clocksource_enable()
655 struct sh_cmt_channel *ch = cs_to_sh_cmt(cs); in sh_cmt_clocksource_disable() local
657 WARN_ON(!ch->cs_enabled); in sh_cmt_clocksource_disable()
659 sh_cmt_stop(ch, FLAG_CLOCKSOURCE); in sh_cmt_clocksource_disable()
660 ch->cs_enabled = false; in sh_cmt_clocksource_disable()
665 struct sh_cmt_channel *ch = cs_to_sh_cmt(cs); in sh_cmt_clocksource_suspend() local
667 if (!ch->cs_enabled) in sh_cmt_clocksource_suspend()
670 sh_cmt_stop(ch, FLAG_CLOCKSOURCE); in sh_cmt_clocksource_suspend()
671 pm_genpd_syscore_poweroff(&ch->cmt->pdev->dev); in sh_cmt_clocksource_suspend()
676 struct sh_cmt_channel *ch = cs_to_sh_cmt(cs); in sh_cmt_clocksource_resume() local
678 if (!ch->cs_enabled) in sh_cmt_clocksource_resume()
681 pm_genpd_syscore_poweron(&ch->cmt->pdev->dev); in sh_cmt_clocksource_resume()
682 sh_cmt_start(ch, FLAG_CLOCKSOURCE); in sh_cmt_clocksource_resume()
685 static int sh_cmt_register_clocksource(struct sh_cmt_channel *ch, in sh_cmt_register_clocksource() argument
688 struct clocksource *cs = &ch->cs; in sh_cmt_register_clocksource()
700 dev_info(&ch->cmt->pdev->dev, "ch%u: used as clock source\n", in sh_cmt_register_clocksource()
701 ch->index); in sh_cmt_register_clocksource()
703 clocksource_register_hz(cs, ch->cmt->rate); in sh_cmt_register_clocksource()
712 static void sh_cmt_clock_event_start(struct sh_cmt_channel *ch, int periodic) in sh_cmt_clock_event_start() argument
714 sh_cmt_start(ch, FLAG_CLOCKEVENT); in sh_cmt_clock_event_start()
717 sh_cmt_set_next(ch, ((ch->cmt->rate + HZ/2) / HZ) - 1); in sh_cmt_clock_event_start()
719 sh_cmt_set_next(ch, ch->max_match_value); in sh_cmt_clock_event_start()
724 struct sh_cmt_channel *ch = ced_to_sh_cmt(ced); in sh_cmt_clock_event_shutdown() local
726 sh_cmt_stop(ch, FLAG_CLOCKEVENT); in sh_cmt_clock_event_shutdown()
733 struct sh_cmt_channel *ch = ced_to_sh_cmt(ced); in sh_cmt_clock_event_set_state() local
737 sh_cmt_stop(ch, FLAG_CLOCKEVENT); in sh_cmt_clock_event_set_state()
739 dev_info(&ch->cmt->pdev->dev, "ch%u: used for %s clock events\n", in sh_cmt_clock_event_set_state()
740 ch->index, periodic ? "periodic" : "oneshot"); in sh_cmt_clock_event_set_state()
741 sh_cmt_clock_event_start(ch, periodic); in sh_cmt_clock_event_set_state()
758 struct sh_cmt_channel *ch = ced_to_sh_cmt(ced); in sh_cmt_clock_event_next() local
761 if (likely(ch->flags & FLAG_IRQCONTEXT)) in sh_cmt_clock_event_next()
762 ch->next_match_value = delta - 1; in sh_cmt_clock_event_next()
764 sh_cmt_set_next(ch, delta - 1); in sh_cmt_clock_event_next()
771 struct sh_cmt_channel *ch = ced_to_sh_cmt(ced); in sh_cmt_clock_event_suspend() local
773 pm_genpd_syscore_poweroff(&ch->cmt->pdev->dev); in sh_cmt_clock_event_suspend()
774 clk_unprepare(ch->cmt->clk); in sh_cmt_clock_event_suspend()
779 struct sh_cmt_channel *ch = ced_to_sh_cmt(ced); in sh_cmt_clock_event_resume() local
781 clk_prepare(ch->cmt->clk); in sh_cmt_clock_event_resume()
782 pm_genpd_syscore_poweron(&ch->cmt->pdev->dev); in sh_cmt_clock_event_resume()
785 static int sh_cmt_register_clockevent(struct sh_cmt_channel *ch, in sh_cmt_register_clockevent() argument
788 struct clock_event_device *ced = &ch->ced; in sh_cmt_register_clockevent()
792 irq = platform_get_irq(ch->cmt->pdev, ch->index); in sh_cmt_register_clockevent()
794 dev_err(&ch->cmt->pdev->dev, "ch%u: failed to get irq\n", in sh_cmt_register_clockevent()
795 ch->index); in sh_cmt_register_clockevent()
801 dev_name(&ch->cmt->pdev->dev), ch); in sh_cmt_register_clockevent()
803 dev_err(&ch->cmt->pdev->dev, "ch%u: failed to request irq %d\n", in sh_cmt_register_clockevent()
804 ch->index, irq); in sh_cmt_register_clockevent()
822 ced->mult = div_sc(ch->cmt->rate, NSEC_PER_SEC, ced->shift); in sh_cmt_register_clockevent()
823 ced->max_delta_ns = clockevent_delta2ns(ch->max_match_value, ced); in sh_cmt_register_clockevent()
824 ced->max_delta_ticks = ch->max_match_value; in sh_cmt_register_clockevent()
828 dev_info(&ch->cmt->pdev->dev, "ch%u: used for clock events\n", in sh_cmt_register_clockevent()
829 ch->index); in sh_cmt_register_clockevent()
835 static int sh_cmt_register(struct sh_cmt_channel *ch, const char *name, in sh_cmt_register() argument
841 ch->cmt->has_clockevent = true; in sh_cmt_register()
842 ret = sh_cmt_register_clockevent(ch, name); in sh_cmt_register()
848 ch->cmt->has_clocksource = true; in sh_cmt_register()
849 sh_cmt_register_clocksource(ch, name); in sh_cmt_register()
855 static int sh_cmt_setup_channel(struct sh_cmt_channel *ch, unsigned int index, in sh_cmt_setup_channel() argument
865 ch->cmt = cmt; in sh_cmt_setup_channel()
866 ch->index = index; in sh_cmt_setup_channel()
867 ch->hwidx = hwidx; in sh_cmt_setup_channel()
868 ch->timer_bit = hwidx; in sh_cmt_setup_channel()
877 ch->ioctrl = cmt->mapbase + 2 + ch->hwidx * 6; in sh_cmt_setup_channel()
881 ch->ioctrl = cmt->mapbase + 0x10 + ch->hwidx * 0x10; in sh_cmt_setup_channel()
885 ch->iostart = cmt->mapbase + ch->hwidx * 0x100; in sh_cmt_setup_channel()
886 ch->ioctrl = ch->iostart + 0x10; in sh_cmt_setup_channel()
887 ch->timer_bit = 0; in sh_cmt_setup_channel()
891 if (cmt->info->width == (sizeof(ch->max_match_value) * 8)) in sh_cmt_setup_channel()
892 ch->max_match_value = ~0; in sh_cmt_setup_channel()
894 ch->max_match_value = (1 << cmt->info->width) - 1; in sh_cmt_setup_channel()
896 ch->match_value = ch->max_match_value; in sh_cmt_setup_channel()
897 raw_spin_lock_init(&ch->lock); in sh_cmt_setup_channel()
899 ret = sh_cmt_register(ch, dev_name(&cmt->pdev->dev), in sh_cmt_setup_channel()
903 ch->index); in sh_cmt_setup_channel()
906 ch->cs_enabled = false; in sh_cmt_setup_channel()