Lines Matching refs:timer
52 static inline u32 apbt_readl(struct dw_apb_timer *timer, unsigned long offs) in apbt_readl() argument
54 return readl(timer->base + offs); in apbt_readl()
57 static inline void apbt_writel(struct dw_apb_timer *timer, u32 val, in apbt_writel() argument
60 writel(val, timer->base + offs); in apbt_writel()
63 static inline u32 apbt_readl_relaxed(struct dw_apb_timer *timer, unsigned long offs) in apbt_readl_relaxed() argument
65 return readl_relaxed(timer->base + offs); in apbt_readl_relaxed()
68 static inline void apbt_writel_relaxed(struct dw_apb_timer *timer, u32 val, in apbt_writel_relaxed() argument
71 writel_relaxed(val, timer->base + offs); in apbt_writel_relaxed()
74 static void apbt_disable_int(struct dw_apb_timer *timer) in apbt_disable_int() argument
76 u32 ctrl = apbt_readl(timer, APBTMR_N_CONTROL); in apbt_disable_int()
79 apbt_writel(timer, ctrl, APBTMR_N_CONTROL); in apbt_disable_int()
89 disable_irq(dw_ced->timer.irq); in dw_apb_clockevent_pause()
90 apbt_disable_int(&dw_ced->timer); in dw_apb_clockevent_pause()
93 static void apbt_eoi(struct dw_apb_timer *timer) in apbt_eoi() argument
95 apbt_readl_relaxed(timer, APBTMR_N_EOI); in apbt_eoi()
109 dw_ced->eoi(&dw_ced->timer); in dw_apb_clockevent_irq()
115 static void apbt_enable_int(struct dw_apb_timer *timer) in apbt_enable_int() argument
117 u32 ctrl = apbt_readl(timer, APBTMR_N_CONTROL); in apbt_enable_int()
119 apbt_readl(timer, APBTMR_N_EOI); in apbt_enable_int()
121 apbt_writel(timer, ctrl, APBTMR_N_CONTROL); in apbt_enable_int()
132 ctrl = apbt_readl(&dw_ced->timer, APBTMR_N_CONTROL); in apbt_shutdown()
134 apbt_writel(&dw_ced->timer, ctrl, APBTMR_N_CONTROL); in apbt_shutdown()
146 ctrl = apbt_readl(&dw_ced->timer, APBTMR_N_CONTROL); in apbt_set_oneshot()
155 apbt_writel(&dw_ced->timer, ctrl, APBTMR_N_CONTROL); in apbt_set_oneshot()
157 apbt_writel(&dw_ced->timer, ctrl, APBTMR_N_CONTROL); in apbt_set_oneshot()
163 apbt_writel(&dw_ced->timer, ~0, APBTMR_N_LOAD_COUNT); in apbt_set_oneshot()
166 apbt_writel(&dw_ced->timer, ctrl, APBTMR_N_CONTROL); in apbt_set_oneshot()
173 unsigned long period = DIV_ROUND_UP(dw_ced->timer.freq, HZ); in apbt_set_periodic()
179 ctrl = apbt_readl(&dw_ced->timer, APBTMR_N_CONTROL); in apbt_set_periodic()
181 apbt_writel(&dw_ced->timer, ctrl, APBTMR_N_CONTROL); in apbt_set_periodic()
187 apbt_writel(&dw_ced->timer, ctrl, APBTMR_N_CONTROL); in apbt_set_periodic()
190 apbt_writel(&dw_ced->timer, period, APBTMR_N_LOAD_COUNT); in apbt_set_periodic()
192 apbt_writel(&dw_ced->timer, ctrl, APBTMR_N_CONTROL); in apbt_set_periodic()
203 apbt_enable_int(&dw_ced->timer); in apbt_resume()
214 ctrl = apbt_readl_relaxed(&dw_ced->timer, APBTMR_N_CONTROL); in apbt_next_event()
216 apbt_writel_relaxed(&dw_ced->timer, ctrl, APBTMR_N_CONTROL); in apbt_next_event()
218 apbt_writel_relaxed(&dw_ced->timer, delta, APBTMR_N_LOAD_COUNT); in apbt_next_event()
220 apbt_writel_relaxed(&dw_ced->timer, ctrl, APBTMR_N_CONTROL); in apbt_next_event()
253 dw_ced->timer.base = base; in dw_apb_clockevent_init()
254 dw_ced->timer.irq = irq; in dw_apb_clockevent_init()
255 dw_ced->timer.freq = freq; in dw_apb_clockevent_init()
272 dw_ced->ced.irq = dw_ced->timer.irq; in dw_apb_clockevent_init()
301 enable_irq(dw_ced->timer.irq); in dw_apb_clockevent_resume()
311 free_irq(dw_ced->timer.irq, &dw_ced->ced); in dw_apb_clockevent_stop()
321 apbt_writel(&dw_ced->timer, 0, APBTMR_N_CONTROL); in dw_apb_clockevent_register()
323 apbt_enable_int(&dw_ced->timer); in dw_apb_clockevent_register()
340 u32 ctrl = apbt_readl(&dw_cs->timer, APBTMR_N_CONTROL); in dw_apb_clocksource_start()
343 apbt_writel(&dw_cs->timer, ctrl, APBTMR_N_CONTROL); in dw_apb_clocksource_start()
344 apbt_writel(&dw_cs->timer, ~0, APBTMR_N_LOAD_COUNT); in dw_apb_clocksource_start()
348 apbt_writel(&dw_cs->timer, ctrl, APBTMR_N_CONTROL); in dw_apb_clocksource_start()
359 current_count = apbt_readl_relaxed(&dw_cs->timer, in __apbt_read_clocksource()
394 dw_cs->timer.base = base; in dw_apb_clocksource_init()
395 dw_cs->timer.freq = freq; in dw_apb_clocksource_init()
413 clocksource_register_hz(&dw_cs->cs, dw_cs->timer.freq); in dw_apb_clocksource_register()
423 return (u64)~apbt_readl(&dw_cs->timer, APBTMR_N_CURRENT_VALUE); in dw_apb_clocksource_read()