1187 	p = DIV_ROUND_UP(pll->params->vco_min, rate);  in _calc_dynamic_ramp_rate()
1217 static unsigned long _clip_vco_min(unsigned long vco_min,  in _clip_vco_min()  argument
1220 	return DIV_ROUND_UP(vco_min, parent_rate) * parent_rate;  in _clip_vco_min()
1994 	pll_params->vco_min = _clip_vco_min(pll_params->vco_min, parent_rate);  in tegra_clk_register_pllxc()
1997 		pll_params->vco_min = pll_params->adjust_vco(pll_params,  in tegra_clk_register_pllxc()
2045 	pll_params->vco_min = _clip_vco_min(pll_params->vco_min, parent_rate);  in tegra_clk_register_pllre()
2048 		pll_params->vco_min = pll_params->adjust_vco(pll_params,  in tegra_clk_register_pllre()
2066 		val |= (pll_params->vco_min / parent_rate) << divn_shift(pll);  in tegra_clk_register_pllre()
2106 	pll_params->vco_min = _clip_vco_min(pll_params->vco_min, parent_rate);  in tegra_clk_register_pllm()
2109 		pll_params->vco_min = pll_params->adjust_vco(pll_params,  in tegra_clk_register_pllm()
2150 	pll_params->vco_min = _clip_vco_min(pll_params->vco_min, parent_rate);  in tegra_clk_register_pllc()
2167 	cfg.n = cfg.m * pll_params->vco_min / parent_rate;  in tegra_clk_register_pllc()
2304 	pll_params->vco_min = _clip_vco_min(pll_params->vco_min, parent_rate);  in tegra_clk_register_pllss()
2309 	cfg.n = cfg.m * pll_params->vco_min / parent_rate;  in tegra_clk_register_pllss()
2363 	pll_params->vco_min = _clip_vco_min(pll_params->vco_min, parent_rate);  in tegra_clk_register_pllre_tegra210()
2366 		pll_params->vco_min = pll_params->adjust_vco(pll_params,  in tegra_clk_register_pllre_tegra210()
2577 	pll_params->vco_min = _clip_vco_min(pll_params->vco_min, parent_rate);  in tegra_clk_register_pllc_tegra210()
2580 		pll_params->vco_min = pll_params->adjust_vco(pll_params,  in tegra_clk_register_pllc_tegra210()
2625 	pll_params->vco_min = _clip_vco_min(pll_params->vco_min, parent_rate);  in tegra_clk_register_pllss_tegra210()
2628 		pll_params->vco_min = pll_params->adjust_vco(pll_params,  in tegra_clk_register_pllss_tegra210()
2667 	pll_params->vco_min = _clip_vco_min(pll_params->vco_min, parent_rate);  in tegra_clk_register_pllmb()
2670 		pll_params->vco_min = pll_params->adjust_vco(pll_params,  in tegra_clk_register_pllmb()