Lines Matching refs:__clk_get_name
219 pr_debug("%s:%s enabled\n", __clk_get_name(hw->clk), __func__); in __clkgen_pll_enable()
254 pr_debug("%s:%s disabled\n", __clk_get_name(hw->clk), __func__); in __clkgen_pll_disable()
363 __clk_get_name(hw->clk), rate); in round_rate_stm_pll3200c32()
368 __func__, __clk_get_name(hw->clk), in round_rate_stm_pll3200c32()
390 __func__, __clk_get_name(hw->clk), in set_rate_stm_pll3200c32()
503 pr_debug("%s:%s rate %lu\n", __clk_get_name(hw->clk), __func__, rate); in recalc_stm_pll4600c28()
517 __clk_get_name(hw->clk), rate); in round_rate_stm_pll4600c28()
522 __func__, __clk_get_name(hw->clk), in round_rate_stm_pll4600c28()
544 __clk_get_name(hw->clk), rate); in set_rate_stm_pll4600c28()
549 __func__, __clk_get_name(hw->clk), in set_rate_stm_pll4600c28()
632 __clk_get_name(clk), in clkgen_pll_register()
633 __clk_get_name(clk_get_parent(clk)), in clkgen_pll_register()
699 __clk_get_name(clk), in clkgen_odf_register()
700 __clk_get_name(clk_get_parent(clk)), in clkgen_odf_register()
732 pll_name = __clk_get_name(clk); in clkgen_c32_pll_setup()