Lines Matching refs:con1
441 u32 con0, con1; in samsung_pll45xx_set_rate() local
453 con1 = readl_relaxed(pll->con_reg + 0x4); in samsung_pll45xx_set_rate()
455 if (!(samsung_pll45xx_mp_change(con0, con1, rate))) { in samsung_pll45xx_set_rate()
473 con1 = readl_relaxed(pll->con_reg + 0x4); in samsung_pll45xx_set_rate()
474 con1 &= ~(PLL45XX_AFC_MASK << PLL45XX_AFC_SHIFT); in samsung_pll45xx_set_rate()
475 con1 |= (rate->afc << PLL45XX_AFC_SHIFT); in samsung_pll45xx_set_rate()
490 writel_relaxed(con1, pll->con_reg + 0x4); in samsung_pll45xx_set_rate()
592 u32 con0, con1, lock; in samsung_pll46xx_set_rate() local
604 con1 = readl_relaxed(pll->con_reg + 0x4); in samsung_pll46xx_set_rate()
606 if (!(samsung_pll46xx_mpk_change(con0, con1, rate))) { in samsung_pll46xx_set_rate()
639 con1 = readl_relaxed(pll->con_reg + 0x4); in samsung_pll46xx_set_rate()
640 con1 &= ~((PLL46XX_KDIV_MASK << PLL46XX_KDIV_SHIFT) | in samsung_pll46xx_set_rate()
643 con1 |= (rate->kdiv << PLL46XX_KDIV_SHIFT) | in samsung_pll46xx_set_rate()
650 writel_relaxed(con1, pll->con_reg + 0x4); in samsung_pll46xx_set_rate()
1107 u32 con0, con1; in samsung_pll2650x_set_rate() local
1118 con1 = readl_relaxed(pll->con_reg + 4); in samsung_pll2650x_set_rate()
1133 con1 &= ~(PLL2650X_K_MASK << PLL2650X_K_SHIFT); in samsung_pll2650x_set_rate()
1134 con1 |= ((rate->kdiv & PLL2650X_K_MASK) << PLL2650X_K_SHIFT); in samsung_pll2650x_set_rate()
1135 writel_relaxed(con1, pll->con_reg + 4); in samsung_pll2650x_set_rate()