Lines Matching refs:R8A7795_CLK_S3D4
98 DEF_FIXED("s3d4", R8A7795_CLK_S3D4, CLK_S3, 4, 1),
124 DEF_MOD("scif5", 202, R8A7795_CLK_S3D4),
125 DEF_MOD("scif4", 203, R8A7795_CLK_S3D4),
126 DEF_MOD("scif3", 204, R8A7795_CLK_S3D4),
127 DEF_MOD("scif1", 206, R8A7795_CLK_S3D4),
128 DEF_MOD("scif0", 207, R8A7795_CLK_S3D4),
141 DEF_MOD("scif2", 310, R8A7795_CLK_S3D4),
198 DEF_MOD("ehci3", 700, R8A7795_CLK_S3D4),
199 DEF_MOD("ehci2", 701, R8A7795_CLK_S3D4),
200 DEF_MOD("ehci1", 702, R8A7795_CLK_S3D4),
201 DEF_MOD("ehci0", 703, R8A7795_CLK_S3D4),
202 DEF_MOD("hsusb", 704, R8A7795_CLK_S3D4),
203 DEF_MOD("hsusb3", 705, R8A7795_CLK_S3D4),
229 DEF_MOD("gpio7", 905, R8A7795_CLK_S3D4),
230 DEF_MOD("gpio6", 906, R8A7795_CLK_S3D4),
231 DEF_MOD("gpio5", 907, R8A7795_CLK_S3D4),
232 DEF_MOD("gpio4", 908, R8A7795_CLK_S3D4),
233 DEF_MOD("gpio3", 909, R8A7795_CLK_S3D4),
234 DEF_MOD("gpio2", 910, R8A7795_CLK_S3D4),
235 DEF_MOD("gpio1", 911, R8A7795_CLK_S3D4),
236 DEF_MOD("gpio0", 912, R8A7795_CLK_S3D4),
238 DEF_MOD("can-if1", 915, R8A7795_CLK_S3D4),
239 DEF_MOD("can-if0", 916, R8A7795_CLK_S3D4),
248 DEF_MOD("ssi-all", 1005, R8A7795_CLK_S3D4),
259 DEF_MOD("scu-all", 1017, R8A7795_CLK_S3D4),
358 { MOD_CLK_ID(523), R8A7795_CLK_S3D4 }, /* PWM */