Lines Matching refs:mode_reg

39 	ret = regmap_read(pll->clkr.regmap, pll->mode_reg, &val);  in clk_pll_enable()
48 	ret = regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_BYPASSNL,  in clk_pll_enable()
60 	ret = regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_RESET_N,  in clk_pll_enable()
69 	return regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_OUTCTRL,  in clk_pll_enable()
79 	regmap_read(pll->clkr.regmap, pll->mode_reg, &val);  in clk_pll_disable()
84 	regmap_update_bits(pll->clkr.regmap, pll->mode_reg, mask, 0);  in clk_pll_disable()
161 	regmap_read(pll->clkr.regmap, pll->mode_reg, &mode);  in clk_pll_set_rate()
258 		qcom_pll_set_fsm_mode(regmap, pll->mode_reg, 1, 8);  in clk_pll_configure_sr()
267 		qcom_pll_set_fsm_mode(regmap, pll->mode_reg, 1, 0);  in clk_pll_configure_sr_hpm_lp()
277 	ret = regmap_read(pll->clkr.regmap, pll->mode_reg, &mode);  in clk_pll_sr2_enable()
282 	ret = regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_BYPASSNL,  in clk_pll_sr2_enable()
294 	ret = regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_RESET_N,  in clk_pll_sr2_enable()
304 	return regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_OUTCTRL,  in clk_pll_sr2_enable()
321 	regmap_read(pll->clkr.regmap, pll->mode_reg, &mode);  in clk_pll_sr2_set_rate()