81 static inline u32 pll_readl(struct pistachio_clk_pll *pll, u32 reg)  in pll_readl()  function
93 	while (!(pll_readl(pll, PLL_STATUS) & PLL_STATUS_LOCK))  in pll_lock()
113 	val = pll_readl(pll, PLL_CTRL3) & PLL_FRAC_CTRL3_DSMPD;  in pll_frac_get_mode()
122 	val = pll_readl(pll, PLL_CTRL3);  in pll_frac_set_mode()
165 	val = pll_readl(pll, PLL_CTRL3);  in pll_gf40lp_frac_enable()
170 	val = pll_readl(pll, PLL_CTRL4);  in pll_gf40lp_frac_enable()
184 	val = pll_readl(pll, PLL_CTRL3);  in pll_gf40lp_frac_disable()
193 	return !(pll_readl(pll, PLL_CTRL3) & PLL_FRAC_CTRL3_PD);  in pll_gf40lp_frac_is_enabled()
229 	val = pll_readl(pll, PLL_CTRL1);  in pll_gf40lp_frac_set_rate()
236 	val = pll_readl(pll, PLL_CTRL2);  in pll_gf40lp_frac_set_rate()
278 	val = pll_readl(pll, PLL_CTRL1);  in pll_gf40lp_frac_recalc_rate()
282 	val = pll_readl(pll, PLL_CTRL2);  in pll_gf40lp_frac_recalc_rate()
322 	val = pll_readl(pll, PLL_CTRL1);  in pll_gf40lp_laint_enable()
327 	val = pll_readl(pll, PLL_CTRL2);  in pll_gf40lp_laint_enable()
341 	val = pll_readl(pll, PLL_CTRL1);  in pll_gf40lp_laint_disable()
350 	return !(pll_readl(pll, PLL_CTRL1) & PLL_INT_CTRL1_PD);  in pll_gf40lp_laint_is_enabled()
382 	val = pll_readl(pll, PLL_CTRL1);  in pll_gf40lp_laint_set_rate()
419 	val = pll_readl(pll, PLL_CTRL1);  in pll_gf40lp_laint_recalc_rate()