256 	struct pic32_ref_osc *refo = clkhw_to_refosc(hw);  in roclk_is_enabled()  local
258 	return readl(refo->ctrl_reg) & REFO_ON;  in roclk_is_enabled()
263 	struct pic32_ref_osc *refo = clkhw_to_refosc(hw);  in roclk_enable()  local
265 	writel(REFO_ON | REFO_OE, PIC32_SET(refo->ctrl_reg));  in roclk_enable()
271 	struct pic32_ref_osc *refo = clkhw_to_refosc(hw);  in roclk_disable()  local
273 	writel(REFO_ON | REFO_OE, PIC32_CLR(refo->ctrl_reg));  in roclk_disable()
284 	struct pic32_ref_osc *refo = clkhw_to_refosc(hw);  in roclk_get_parent()  local
287 	v = (readl(refo->ctrl_reg) >> REFO_SEL_SHIFT) & REFO_SEL_MASK;  in roclk_get_parent()
289 	if (!refo->parent_map)  in roclk_get_parent()
293 		if (refo->parent_map[i] == v)  in roclk_get_parent()
366 	struct pic32_ref_osc *refo = clkhw_to_refosc(hw);  in roclk_recalc_rate()  local
370 	v = readl(refo->ctrl_reg);  in roclk_recalc_rate()
374 	v = readl(refo->ctrl_reg + REFO_TRIM_REG);  in roclk_recalc_rate()
448 	struct pic32_ref_osc *refo = clkhw_to_refosc(hw);  in roclk_set_parent()  local
453 	if (refo->parent_map)  in roclk_set_parent()
454 		index = refo->parent_map[index];  in roclk_set_parent()
457 	err = readl_poll_timeout(refo->ctrl_reg, v, !(v & REFO_ACTIVE),  in roclk_set_parent()
464 	spin_lock_irqsave(&refo->core->reg_lock, flags);  in roclk_set_parent()
469 	v = readl(refo->ctrl_reg);  in roclk_set_parent()
473 	writel(v, refo->ctrl_reg);  in roclk_set_parent()
475 	spin_unlock_irqrestore(&refo->core->reg_lock, flags);  in roclk_set_parent()
485 	struct pic32_ref_osc *refo = clkhw_to_refosc(hw);  in roclk_set_rate_and_parent()  local
497 	err = readl_poll_timeout(refo->ctrl_reg, v,  in roclk_set_rate_and_parent()
505 	spin_lock_irqsave(&refo->core->reg_lock, flags);  in roclk_set_rate_and_parent()
506 	v = readl(refo->ctrl_reg);  in roclk_set_rate_and_parent()
511 	if (refo->parent_map)  in roclk_set_rate_and_parent()
512 		index = refo->parent_map[index];  in roclk_set_rate_and_parent()
520 	writel(v, refo->ctrl_reg);  in roclk_set_rate_and_parent()
523 	v = readl(refo->ctrl_reg + REFO_TRIM_REG);  in roclk_set_rate_and_parent()
526 	writel(v, refo->ctrl_reg + REFO_TRIM_REG);  in roclk_set_rate_and_parent()
529 	writel(REFO_ON | REFO_DIVSW_EN, PIC32_SET(refo->ctrl_reg));  in roclk_set_rate_and_parent()
532 	err = readl_poll_timeout_atomic(refo->ctrl_reg, v, !(v & REFO_DIVSW_EN),  in roclk_set_rate_and_parent()
535 	writel(REFO_ON, PIC32_CLR(refo->ctrl_reg));  in roclk_set_rate_and_parent()
537 	spin_unlock_irqrestore(&refo->core->reg_lock, flags);  in roclk_set_rate_and_parent()
566 	struct pic32_ref_osc *refo;  in pic32_refo_clk_register()  local
569 	refo = devm_kzalloc(core->dev, sizeof(*refo), GFP_KERNEL);  in pic32_refo_clk_register()
570 	if (!refo)  in pic32_refo_clk_register()
573 	refo->core = core;  in pic32_refo_clk_register()
574 	refo->hw.init = &data->init_data;  in pic32_refo_clk_register()
575 	refo->ctrl_reg = data->ctrl_reg + core->iobase;  in pic32_refo_clk_register()
576 	refo->parent_map = data->parent_map;  in pic32_refo_clk_register()
578 	clk = devm_clk_register(core->dev, &refo->hw);  in pic32_refo_clk_register()