Lines Matching refs:bit_idx
228 .bit_idx = 27,
259 .bit_idx = 28,
283 .bit_idx = 29,
307 .bit_idx = 30,
331 .bit_idx = 31,
390 .bit_idx = 14,
431 .bit_idx = 14,
472 .bit_idx = 14,
522 .bit_idx = 7,
673 .bit_idx = 8,
994 u8 bit_idx; member
997 .reg = HHI_SYS_CPU_CLK_CNTL0, .bit_idx = 30
1000 .reg = HHI_SYS_CPU_CLK_CNTL0, .bit_idx = 29
1003 .reg = HHI_SYS_CPU_CLK_CNTL0, .bit_idx = 28
1006 .reg = HHI_SYS_CPU_CLK_CNTL0, .bit_idx = 27
1009 .reg = HHI_SYS_CPU_CLK_CNTL0, .bit_idx = 26
1012 .reg = HHI_SYS_CPU_CLK_CNTL0, .bit_idx = 25
1015 .reg = HHI_SYS_CPU_CLK_CNTL0, .bit_idx = 24
1018 .reg = HHI_SYS_CPU_CLK_CNTL0, .bit_idx = 18
1021 .reg = HHI_SYS_CPU_CLK_CNTL0, .bit_idx = 17
1024 .reg = HHI_SYS_CPU_CLK_CNTL0, .bit_idx = 16
1027 .reg = HHI_SYS_CPU_CLK_CNTL1, .bit_idx = 30
1030 .reg = HHI_VID_CLK_CNTL, .bit_idx = 15
1033 .reg = HHI_VID_DIVIDER_CNTL, .bit_idx = 7
1036 .reg = HHI_VID_DIVIDER_CNTL, .bit_idx = 3
1039 .reg = HHI_VID_DIVIDER_CNTL, .bit_idx = 1
1042 .reg = HHI_VID_DIVIDER_CNTL, .bit_idx = 0
1064 val |= BIT(reset->bit_idx); in meson8b_clk_reset_update()
1066 val &= ~BIT(reset->bit_idx); in meson8b_clk_reset_update()