Lines Matching refs:clkgr
252 uint32_t clkgr = readl(cgu->base + CGU_REG_CLKGR); in jz4740_clock_udc_disable_auto_suspend() local
254 clkgr &= ~CLKGR_UDC; in jz4740_clock_udc_disable_auto_suspend()
255 writel(clkgr, cgu->base + CGU_REG_CLKGR); in jz4740_clock_udc_disable_auto_suspend()
261 uint32_t clkgr = readl(cgu->base + CGU_REG_CLKGR); in jz4740_clock_udc_enable_auto_suspend() local
263 clkgr |= CLKGR_UDC; in jz4740_clock_udc_enable_auto_suspend()
264 writel(clkgr, cgu->base + CGU_REG_CLKGR); in jz4740_clock_udc_enable_auto_suspend()
274 uint32_t clkgr, cppcr; in jz4740_clock_suspend() local
276 clkgr = readl(cgu->base + CGU_REG_CLKGR); in jz4740_clock_suspend()
277 clkgr |= JZ_CLOCK_GATE_TCU | JZ_CLOCK_GATE_DMAC | JZ_CLOCK_GATE_UART0; in jz4740_clock_suspend()
278 writel(clkgr, cgu->base + CGU_REG_CLKGR); in jz4740_clock_suspend()
287 uint32_t clkgr, cppcr, stable; in jz4740_clock_resume() local
298 clkgr = readl(cgu->base + CGU_REG_CLKGR); in jz4740_clock_resume()
299 clkgr &= ~JZ_CLOCK_GATE_TCU; in jz4740_clock_resume()
300 clkgr &= ~JZ_CLOCK_GATE_DMAC; in jz4740_clock_resume()
301 clkgr &= ~JZ_CLOCK_GATE_UART0; in jz4740_clock_resume()
302 writel(clkgr, cgu->base + CGU_REG_CLKGR); in jz4740_clock_resume()