55 	 void __iomem *reg, u8 shift, u32 exclusive_mask);
61 				 void __iomem *reg, u8 shift, u8 width,
64 struct clk *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift,
69 				  void __iomem *reg, u8 shift, u8 width,
73 			      u8 shift, u8 width, const char **parents,
82 		u8 shift, u8 width, const char **parents, int num_parents)  in imx_clk_mux_ldb()  argument
86 			shift, width, CLK_MUX_READ_ONLY, &imx_ccm_lock);  in imx_clk_mux_ldb()
97 		void __iomem *reg, u8 shift, u8 width)  in imx_clk_divider()  argument
100 			reg, shift, width, 0, &imx_ccm_lock);  in imx_clk_divider()
104 		const char *parent, void __iomem *reg, u8 shift, u8 width,  in imx_clk_divider_flags()  argument
108 			reg, shift, width, 0, &imx_ccm_lock);  in imx_clk_divider_flags()
112 		void __iomem *reg, u8 shift, u8 width)  in imx_clk_divider2()  argument
116 			reg, shift, width, 0, &imx_ccm_lock);  in imx_clk_divider2()
120 		void __iomem *reg, u8 shift)  in imx_clk_gate()  argument
123 			shift, 0, &imx_ccm_lock);  in imx_clk_gate()
127 		void __iomem *reg, u8 shift, unsigned long flags)  in imx_clk_gate_flags()  argument
130 			shift, 0, &imx_ccm_lock);  in imx_clk_gate_flags()
134 		void __iomem *reg, u8 shift)  in imx_clk_gate_dis()  argument
137 			shift, CLK_GATE_SET_TO_DISABLE, &imx_ccm_lock);  in imx_clk_gate_dis()
141 		void __iomem *reg, u8 shift)  in imx_clk_gate2()  argument
144 			shift, 0x3, 0, &imx_ccm_lock, NULL);  in imx_clk_gate2()
148 		void __iomem *reg, u8 shift, unsigned long flags)  in imx_clk_gate2_flags()  argument
151 			shift, 0x3, 0, &imx_ccm_lock, NULL);  in imx_clk_gate2_flags()
155 		const char *parent, void __iomem *reg, u8 shift,  in imx_clk_gate2_shared()  argument
159 			shift, 0x3, 0, &imx_ccm_lock, share_count);  in imx_clk_gate2_shared()
163 		const char *parent, void __iomem *reg, u8 shift,  in imx_clk_gate2_shared2()  argument
167 				  CLK_OPS_PARENT_ENABLE, reg, shift, 0x3, 0,  in imx_clk_gate2_shared2()
172 		const char *parent, void __iomem *reg, u8 shift, u8 cgr_val)  in imx_clk_gate2_cgr()  argument
175 			shift, cgr_val, 0, &imx_ccm_lock, NULL);  in imx_clk_gate2_cgr()
179 		void __iomem *reg, u8 shift)  in imx_clk_gate3()  argument
183 			reg, shift, 0, &imx_ccm_lock);  in imx_clk_gate3()
187 		void __iomem *reg, u8 shift)  in imx_clk_gate4()  argument
191 			reg, shift, 0x3, 0, &imx_ccm_lock, NULL);  in imx_clk_gate4()
195 		u8 shift, u8 width, const char **parents, int num_parents)  in imx_clk_mux()  argument
198 			CLK_SET_RATE_NO_REPARENT, reg, shift,  in imx_clk_mux()
203 		u8 shift, u8 width, const char **parents, int num_parents)  in imx_clk_mux2()  argument
207 			reg, shift, width, 0, &imx_ccm_lock);  in imx_clk_mux2()
211 		void __iomem *reg, u8 shift, u8 width, const char **parents,  in imx_clk_mux_flags()  argument
215 			flags | CLK_SET_RATE_NO_REPARENT, reg, shift, width, 0,  in imx_clk_mux_flags()