59 	u32 val = readl_relaxed(pll->base) & pll->power_bit;  in clk_pllv3_wait_lock()
67 		if (readl_relaxed(pll->base) & BM_PLL_LOCK)  in clk_pllv3_wait_lock()
74 	return readl_relaxed(pll->base) & BM_PLL_LOCK ? 0 : -ETIMEDOUT;  in clk_pllv3_wait_lock()
82 	val = readl_relaxed(pll->base);  in clk_pllv3_prepare()
97 	val = readl_relaxed(pll->base);  in clk_pllv3_unprepare()
109 	if (readl_relaxed(pll->base) & BM_PLL_LOCK)  in clk_pllv3_is_prepared()
119 	u32 div = (readl_relaxed(pll->base) >> pll->div_shift)  & pll->div_mask;  in clk_pllv3_recalc_rate()
146 	val = readl_relaxed(pll->base);  in clk_pllv3_set_rate()
167 	u32 div = readl_relaxed(pll->base) & pll->div_mask;  in clk_pllv3_sys_recalc_rate()
201 	val = readl_relaxed(pll->base);  in clk_pllv3_sys_set_rate()
222 	u32 mfn = readl_relaxed(pll->base + PLL_NUM_OFFSET);  in clk_pllv3_av_recalc_rate()
223 	u32 mfd = readl_relaxed(pll->base + PLL_DENOM_OFFSET);  in clk_pllv3_av_recalc_rate()
224 	u32 div = readl_relaxed(pll->base) & pll->div_mask;  in clk_pllv3_av_recalc_rate()
288 	val = readl_relaxed(pll->base);  in clk_pllv3_av_set_rate()
355 	mf.mfn = readl_relaxed(pll->base + PLL_VF610_NUM_OFFSET);  in clk_pllv3_vf610_recalc_rate()
356 	mf.mfd = readl_relaxed(pll->base + PLL_VF610_DENOM_OFFSET);  in clk_pllv3_vf610_recalc_rate()
357 	mf.mfi = (readl_relaxed(pll->base) & pll->div_mask) ? 22 : 20;  in clk_pllv3_vf610_recalc_rate()
378 	val = readl_relaxed(pll->base);  in clk_pllv3_vf610_set_rate()