Lines Matching refs:Bits
2609 } Bits; member
2625 } Bits; member
2760 InterruptMaskRegister.Bits.HardwareMailboxInterrupt = true; in DAC960_GEM_EnableInterrupts()
2761 InterruptMaskRegister.Bits.MemoryMailboxInterrupt = true; in DAC960_GEM_EnableInterrupts()
2771 InterruptMaskRegister.Bits.HardwareMailboxInterrupt = true; in DAC960_GEM_DisableInterrupts()
2772 InterruptMaskRegister.Bits.MemoryMailboxInterrupt = true; in DAC960_GEM_DisableInterrupts()
2784 return !(InterruptMaskRegister.Bits.HardwareMailboxInterrupt || in DAC960_GEM_InterruptsEnabledP()
2785 InterruptMaskRegister.Bits.MemoryMailboxInterrupt); in DAC960_GEM_InterruptsEnabledP()
2831 if (!ErrorStatusRegister.Bits.ErrorStatusPending) return false; in DAC960_GEM_ReadErrorStatus()
2832 ErrorStatusRegister.Bits.ErrorStatusPending = false; in DAC960_GEM_ReadErrorStatus()
2919 } Bits; member
2935 } Bits; member
3067 InterruptMaskRegister.Bits.DisableInterrupts = false; in DAC960_BA_EnableInterrupts()
3068 InterruptMaskRegister.Bits.DisableInterruptsI2O = true; in DAC960_BA_EnableInterrupts()
3078 InterruptMaskRegister.Bits.DisableInterrupts = true; in DAC960_BA_DisableInterrupts()
3079 InterruptMaskRegister.Bits.DisableInterruptsI2O = true; in DAC960_BA_DisableInterrupts()
3090 return !InterruptMaskRegister.Bits.DisableInterrupts; in DAC960_BA_InterruptsEnabledP()
3137 if (!ErrorStatusRegister.Bits.ErrorStatusPending) return false; in DAC960_BA_ReadErrorStatus()
3138 ErrorStatusRegister.Bits.ErrorStatusPending = false; in DAC960_BA_ReadErrorStatus()
3224 } Bits; member
3240 } Bits; member
3372 InterruptMaskRegister.Bits.DisableInterrupts = false; in DAC960_LP_EnableInterrupts()
3382 InterruptMaskRegister.Bits.DisableInterrupts = true; in DAC960_LP_DisableInterrupts()
3393 return !InterruptMaskRegister.Bits.DisableInterrupts; in DAC960_LP_InterruptsEnabledP()
3439 if (!ErrorStatusRegister.Bits.ErrorStatusPending) return false; in DAC960_LP_ReadErrorStatus()
3440 ErrorStatusRegister.Bits.ErrorStatusPending = false; in DAC960_LP_ReadErrorStatus()
3538 } Bits; member
3554 } Bits; member
3686 InterruptMaskRegister.Bits.DisableInterrupts = false; in DAC960_LA_EnableInterrupts()
3696 InterruptMaskRegister.Bits.DisableInterrupts = true; in DAC960_LA_DisableInterrupts()
3707 return !InterruptMaskRegister.Bits.DisableInterrupts; in DAC960_LA_InterruptsEnabledP()
3760 if (!ErrorStatusRegister.Bits.ErrorStatusPending) return false; in DAC960_LA_ReadErrorStatus()
3761 ErrorStatusRegister.Bits.ErrorStatusPending = false; in DAC960_LA_ReadErrorStatus()
3859 } Bits; member
3875 } Bits; member
4007 InterruptMaskRegister.Bits.MessageUnitInterruptMask1 = 0x3; in DAC960_PG_EnableInterrupts()
4008 InterruptMaskRegister.Bits.DisableInterrupts = false; in DAC960_PG_EnableInterrupts()
4009 InterruptMaskRegister.Bits.MessageUnitInterruptMask2 = 0x1F; in DAC960_PG_EnableInterrupts()
4019 InterruptMaskRegister.Bits.MessageUnitInterruptMask1 = 0x3; in DAC960_PG_DisableInterrupts()
4020 InterruptMaskRegister.Bits.DisableInterrupts = true; in DAC960_PG_DisableInterrupts()
4021 InterruptMaskRegister.Bits.MessageUnitInterruptMask2 = 0x1F; in DAC960_PG_DisableInterrupts()
4032 return !InterruptMaskRegister.Bits.DisableInterrupts; in DAC960_PG_InterruptsEnabledP()
4085 if (!ErrorStatusRegister.Bits.ErrorStatusPending) return false; in DAC960_PG_ReadErrorStatus()
4086 ErrorStatusRegister.Bits.ErrorStatusPending = false; in DAC960_PG_ReadErrorStatus()
4179 } Bits; member
4195 } Bits; member
4287 InterruptEnableRegister.Bits.EnableInterrupts = true; in DAC960_PD_EnableInterrupts()
4297 InterruptEnableRegister.Bits.EnableInterrupts = false; in DAC960_PD_DisableInterrupts()
4308 return InterruptEnableRegister.Bits.EnableInterrupts; in DAC960_PD_InterruptsEnabledP()
4347 if (!ErrorStatusRegister.Bits.ErrorStatusPending) return false; in DAC960_PD_ReadErrorStatus()
4348 ErrorStatusRegister.Bits.ErrorStatusPending = false; in DAC960_PD_ReadErrorStatus()