Lines Matching refs:tegra
188 struct tegra_ahci_priv *tegra = hpriv->plat_data; in tegra_ahci_handle_quirks() local
191 if (tegra->sata_aux_regs && !tegra->soc->supports_devslp) { in tegra_ahci_handle_quirks()
192 val = readl(tegra->sata_aux_regs + SATA_AUX_MISC_CNTL_1_0); in tegra_ahci_handle_quirks()
194 writel(val, tegra->sata_aux_regs + SATA_AUX_MISC_CNTL_1_0); in tegra_ahci_handle_quirks()
200 struct tegra_ahci_priv *tegra = hpriv->plat_data; in tegra124_ahci_init() local
212 writel(BIT(0), tegra->sata_regs + SCFG_OFFSET + T_SATA0_INDEX); in tegra124_ahci_init()
214 val = readl(tegra->sata_regs + in tegra124_ahci_init()
220 writel(val, tegra->sata_regs + SCFG_OFFSET + in tegra124_ahci_init()
223 val = readl(tegra->sata_regs + in tegra124_ahci_init()
229 writel(val, tegra->sata_regs + SCFG_OFFSET + in tegra124_ahci_init()
233 tegra->sata_regs + SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL11); in tegra124_ahci_init()
235 tegra->sata_regs + SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL2); in tegra124_ahci_init()
237 writel(0, tegra->sata_regs + SCFG_OFFSET + T_SATA0_INDEX); in tegra124_ahci_init()
244 struct tegra_ahci_priv *tegra = hpriv->plat_data; in tegra_ahci_power_on() local
247 ret = regulator_bulk_enable(tegra->soc->num_supplies, in tegra_ahci_power_on()
248 tegra->supplies); in tegra_ahci_power_on()
253 tegra->sata_clk, in tegra_ahci_power_on()
254 tegra->sata_rst); in tegra_ahci_power_on()
258 reset_control_assert(tegra->sata_oob_rst); in tegra_ahci_power_on()
259 reset_control_assert(tegra->sata_cold_rst); in tegra_ahci_power_on()
265 reset_control_deassert(tegra->sata_cold_rst); in tegra_ahci_power_on()
266 reset_control_deassert(tegra->sata_oob_rst); in tegra_ahci_power_on()
271 clk_disable_unprepare(tegra->sata_clk); in tegra_ahci_power_on()
276 regulator_bulk_disable(tegra->soc->num_supplies, tegra->supplies); in tegra_ahci_power_on()
283 struct tegra_ahci_priv *tegra = hpriv->plat_data; in tegra_ahci_power_off() local
287 reset_control_assert(tegra->sata_rst); in tegra_ahci_power_off()
288 reset_control_assert(tegra->sata_oob_rst); in tegra_ahci_power_off()
289 reset_control_assert(tegra->sata_cold_rst); in tegra_ahci_power_off()
291 clk_disable_unprepare(tegra->sata_clk); in tegra_ahci_power_off()
294 regulator_bulk_disable(tegra->soc->num_supplies, tegra->supplies); in tegra_ahci_power_off()
299 struct tegra_ahci_priv *tegra = hpriv->plat_data; in tegra_ahci_controller_init() local
305 dev_err(&tegra->pdev->dev, in tegra_ahci_controller_init()
314 val = readl(tegra->sata_regs + SATA_FPCI_BAR5); in tegra_ahci_controller_init()
317 writel(val, tegra->sata_regs + SATA_FPCI_BAR5); in tegra_ahci_controller_init()
320 val = readl(tegra->sata_regs + SATA_CONFIGURATION_0); in tegra_ahci_controller_init()
322 writel(val, tegra->sata_regs + SATA_CONFIGURATION_0); in tegra_ahci_controller_init()
326 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL17_0); in tegra_ahci_controller_init()
328 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL18_0); in tegra_ahci_controller_init()
330 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL20_0); in tegra_ahci_controller_init()
332 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL21_0); in tegra_ahci_controller_init()
336 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA_CFG_PHY_0); in tegra_ahci_controller_init()
339 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA_CFG_PHY_0); in tegra_ahci_controller_init()
341 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_NVOOB); in tegra_ahci_controller_init()
348 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_NVOOB); in tegra_ahci_controller_init()
353 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG2NVOOB_2); in tegra_ahci_controller_init()
356 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG2NVOOB_2); in tegra_ahci_controller_init()
358 if (tegra->soc->ops && tegra->soc->ops->init) in tegra_ahci_controller_init()
359 tegra->soc->ops->init(hpriv); in tegra_ahci_controller_init()
365 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_1); in tegra_ahci_controller_init()
368 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_1); in tegra_ahci_controller_init()
370 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_9); in tegra_ahci_controller_init()
373 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_SATA); in tegra_ahci_controller_init()
375 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_SATA); in tegra_ahci_controller_init()
377 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_BKDOOR_CC); in tegra_ahci_controller_init()
382 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_BKDOOR_CC); in tegra_ahci_controller_init()
384 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_SATA); in tegra_ahci_controller_init()
386 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_SATA); in tegra_ahci_controller_init()
389 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_AHCI_HBA_CAP_BKDR); in tegra_ahci_controller_init()
394 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_AHCI_HBA_CAP_BKDR); in tegra_ahci_controller_init()
400 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_35); in tegra_ahci_controller_init()
403 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_35); in tegra_ahci_controller_init()
406 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_AHCI_IDP1); in tegra_ahci_controller_init()
408 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_PHY_1); in tegra_ahci_controller_init()
411 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_PHY_1); in tegra_ahci_controller_init()
414 val = readl(tegra->sata_regs + SATA_CONFIGURATION_0); in tegra_ahci_controller_init()
416 writel(val, tegra->sata_regs + SATA_CONFIGURATION_0); in tegra_ahci_controller_init()
422 val = readl(tegra->sata_regs + SATA_INTR_MASK); in tegra_ahci_controller_init()
424 writel(val, tegra->sata_regs + SATA_INTR_MASK); in tegra_ahci_controller_init()
492 struct tegra_ahci_priv *tegra; in tegra_ahci_probe() local
501 tegra = devm_kzalloc(&pdev->dev, sizeof(*tegra), GFP_KERNEL); in tegra_ahci_probe()
502 if (!tegra) in tegra_ahci_probe()
505 hpriv->plat_data = tegra; in tegra_ahci_probe()
507 tegra->pdev = pdev; in tegra_ahci_probe()
508 tegra->soc = of_device_get_match_data(&pdev->dev); in tegra_ahci_probe()
511 tegra->sata_regs = devm_ioremap_resource(&pdev->dev, res); in tegra_ahci_probe()
512 if (IS_ERR(tegra->sata_regs)) in tegra_ahci_probe()
513 return PTR_ERR(tegra->sata_regs); in tegra_ahci_probe()
520 tegra->sata_aux_regs = devm_ioremap_resource(&pdev->dev, res); in tegra_ahci_probe()
521 if (IS_ERR(tegra->sata_aux_regs)) in tegra_ahci_probe()
522 return PTR_ERR(tegra->sata_aux_regs); in tegra_ahci_probe()
525 tegra->sata_rst = devm_reset_control_get(&pdev->dev, "sata"); in tegra_ahci_probe()
526 if (IS_ERR(tegra->sata_rst)) { in tegra_ahci_probe()
528 return PTR_ERR(tegra->sata_rst); in tegra_ahci_probe()
531 tegra->sata_oob_rst = devm_reset_control_get(&pdev->dev, "sata-oob"); in tegra_ahci_probe()
532 if (IS_ERR(tegra->sata_oob_rst)) { in tegra_ahci_probe()
534 return PTR_ERR(tegra->sata_oob_rst); in tegra_ahci_probe()
537 tegra->sata_cold_rst = devm_reset_control_get(&pdev->dev, "sata-cold"); in tegra_ahci_probe()
538 if (IS_ERR(tegra->sata_cold_rst)) { in tegra_ahci_probe()
540 return PTR_ERR(tegra->sata_cold_rst); in tegra_ahci_probe()
543 tegra->sata_clk = devm_clk_get(&pdev->dev, "sata"); in tegra_ahci_probe()
544 if (IS_ERR(tegra->sata_clk)) { in tegra_ahci_probe()
546 return PTR_ERR(tegra->sata_clk); in tegra_ahci_probe()
549 tegra->supplies = devm_kcalloc(&pdev->dev, in tegra_ahci_probe()
550 tegra->soc->num_supplies, in tegra_ahci_probe()
551 sizeof(*tegra->supplies), GFP_KERNEL); in tegra_ahci_probe()
552 if (!tegra->supplies) in tegra_ahci_probe()
555 for (i = 0; i < tegra->soc->num_supplies; i++) in tegra_ahci_probe()
556 tegra->supplies[i].supply = tegra->soc->supply_names[i]; in tegra_ahci_probe()
559 tegra->soc->num_supplies, in tegra_ahci_probe()
560 tegra->supplies); in tegra_ahci_probe()