165 #define dst_hi	dst[1]  macro
259 		emit_ia32_mov_r(dst_hi, src_hi, dstk, sstk, pprog);  in emit_ia32_mov_r64()
262 		emit_ia32_mov_i(dst_hi, 0, dstk, pprog);  in emit_ia32_mov_r64()
274 	emit_ia32_mov_i(dst_hi, hi, dstk, pprog);  in emit_ia32_mov_i64()
319 	u8 dreg_hi = dstk ? IA32_EDX : dst_hi;  in emit_ia32_to_le_r64()
325 		      STACK_VAR(dst_hi));  in emit_ia32_to_le_r64()
353 		      STACK_VAR(dst_hi));  in emit_ia32_to_le_r64()
364 	u8 dreg_hi = dstk ? IA32_EDX : dst_hi;  in emit_ia32_to_be_r64()
370 		      STACK_VAR(dst_hi));  in emit_ia32_to_be_r64()
416 		      STACK_VAR(dst_hi));  in emit_ia32_to_be_r64()
576 		emit_ia32_alu_r(is64, true, op, dst_hi, src_hi, dstk, sstk,  in emit_ia32_alu_r64()
579 		emit_ia32_mov_i(dst_hi, 0, dstk, &prog);  in emit_ia32_alu_r64()
679 		emit_ia32_alu_i(is64, true, op, dst_hi, hi, dstk, &prog);  in emit_ia32_alu_i64()
681 		emit_ia32_mov_i(dst_hi, 0, dstk, &prog);  in emit_ia32_alu_i64()
692 	u8 dreg_hi = dstk ? IA32_EDX : dst_hi;  in emit_ia32_neg64()
698 		      STACK_VAR(dst_hi));  in emit_ia32_neg64()
721 		      STACK_VAR(dst_hi));  in emit_ia32_neg64()
736 	u8 dreg_hi = dstk ? IA32_EDX : dst_hi;  in emit_ia32_lsh_r64()
742 		      STACK_VAR(dst_hi));  in emit_ia32_lsh_r64()
832 		      STACK_VAR(dst_hi));  in emit_ia32_lsh_r64()
848 	u8 dreg_hi = dstk ? IA32_EDX : dst_hi;  in emit_ia32_arsh_r64()
854 		      STACK_VAR(dst_hi));  in emit_ia32_arsh_r64()
944 		      STACK_VAR(dst_hi));  in emit_ia32_arsh_r64()
960 	u8 dreg_hi = dstk ? IA32_EDX : dst_hi;  in emit_ia32_rsh_r64()
966 		      STACK_VAR(dst_hi));  in emit_ia32_rsh_r64()
1054 		      STACK_VAR(dst_hi));  in emit_ia32_rsh_r64()
1067 	u8 dreg_hi = dstk ? IA32_EDX : dst_hi;  in emit_ia32_lsh_i64()
1073 		      STACK_VAR(dst_hi));  in emit_ia32_lsh_i64()
1120 		      STACK_VAR(dst_hi));  in emit_ia32_lsh_i64()
1132 	u8 dreg_hi = dstk ? IA32_EDX : dst_hi;  in emit_ia32_rsh_i64()
1138 		      STACK_VAR(dst_hi));  in emit_ia32_rsh_i64()
1186 		      STACK_VAR(dst_hi));  in emit_ia32_rsh_i64()
1198 	u8 dreg_hi = dstk ? IA32_EDX : dst_hi;  in emit_ia32_arsh_i64()
1204 		      STACK_VAR(dst_hi));  in emit_ia32_arsh_i64()
1252 		      STACK_VAR(dst_hi));  in emit_ia32_arsh_i64()
1266 		      STACK_VAR(dst_hi));  in emit_ia32_mul_r64()
1269 		EMIT2(0x8B, add_2reg(0xC0, dst_hi, IA32_EAX));  in emit_ia32_mul_r64()
1323 		      STACK_VAR(dst_hi));  in emit_ia32_mul_r64()
1328 		EMIT2(0x89, add_2reg(0xC0, dst_hi, IA32_ECX));  in emit_ia32_mul_r64()
1346 		EMIT3(0xF7, add_1reg(0x60, IA32_EBP), STACK_VAR(dst_hi));  in emit_ia32_mul_i64()
1349 		EMIT2(0xF7, add_1reg(0xE0, dst_hi));  in emit_ia32_mul_i64()
1383 		      STACK_VAR(dst_hi));  in emit_ia32_mul_i64()
1388 		EMIT2(0x89, add_2reg(0xC0, dst_hi, IA32_ECX));  in emit_ia32_mul_i64()
1716 			emit_ia32_mov_i(dst_hi, 0, dstk, &prog);  in do_jit()
1736 			emit_ia32_mov_i(dst_hi, 0, dstk, &prog);  in do_jit()
1758 			emit_ia32_mov_i(dst_hi, 0, dstk, &prog);  in do_jit()
1775 			emit_ia32_mov_i(dst_hi, 0, dstk, &prog);  in do_jit()
1811 			emit_ia32_mov_i(dst_hi, 0, dstk, &prog);  in do_jit()
1843 			emit_ia32_mov_i(dst_hi, hi, dstk, &prog);  in do_jit()
1992 					      STACK_VAR(dst_hi));  in do_jit()
1995 					EMIT3(0xC7, add_1reg(0xC0, dst_hi), 0);  in do_jit()
2006 					      STACK_VAR(dst_hi));  in do_jit()
2009 					      add_2reg(0xC0, dst_hi, IA32_EDX));  in do_jit()
2077 			u8 dreg_hi = dstk ? IA32_EDX : dst_hi;  in do_jit()
2085 				      STACK_VAR(dst_hi));  in do_jit()
2104 			u8 dreg_hi = dstk ? IA32_EDX : dst_hi;  in do_jit()
2112 				      STACK_VAR(dst_hi));  in do_jit()
2132 			u8 dreg_hi = dstk ? IA32_EDX : dst_hi;  in do_jit()
2140 				      STACK_VAR(dst_hi));  in do_jit()
2169 			u8 dreg_hi = dstk ? IA32_EDX : dst_hi;  in do_jit()
2177 				      STACK_VAR(dst_hi));  in do_jit()