Lines Matching refs:control
462 vmcb->control.clean = 0; in mark_all_dirty()
467 vmcb->control.clean = ((1 << VMCB_DIRTY_MAX) - 1) in mark_all_clean()
473 vmcb->control.clean &= ~(1 << bit); in mark_dirty()
483 svm->vmcb->control.avic_vapic_bar = data & VMCB_AVIC_APIC_BAR_MASK; in avic_update_vapic_bar()
508 c = &svm->vmcb->control; in recalc_intercepts()
509 h = &svm->nested.hsave->control; in recalc_intercepts()
530 vmcb->control.intercept_cr |= (1U << bit); in set_cr_intercept()
539 vmcb->control.intercept_cr &= ~(1U << bit); in clr_cr_intercept()
548 return vmcb->control.intercept_cr & (1U << bit); in is_cr_intercept()
555 vmcb->control.intercept_dr = (1 << INTERCEPT_DR0_READ) in set_dr_intercepts()
579 vmcb->control.intercept_dr = 0; in clr_dr_intercepts()
588 vmcb->control.intercept_exceptions |= (1U << bit); in set_exception_intercept()
597 vmcb->control.intercept_exceptions &= ~(1U << bit); in clr_exception_intercept()
606 vmcb->control.intercept |= (1ULL << bit); in set_intercept()
615 vmcb->control.intercept &= ~(1ULL << bit); in clr_intercept()
622 return !!(svm->vmcb->control.int_ctl & V_GIF_ENABLE_MASK); in vgif_enabled()
628 svm->vmcb->control.int_ctl |= V_GIF_MASK; in enable_gif()
636 svm->vmcb->control.int_ctl &= ~V_GIF_MASK; in disable_gif()
644 return !!(svm->vmcb->control.int_ctl & V_GIF_MASK); in gif_set()
757 if (svm->vmcb->control.int_state & SVM_INTERRUPT_SHADOW_MASK) in svm_get_interrupt_shadow()
767 svm->vmcb->control.int_state &= ~SVM_INTERRUPT_SHADOW_MASK; in svm_set_interrupt_shadow()
769 svm->vmcb->control.int_state |= SVM_INTERRUPT_SHADOW_MASK; in svm_set_interrupt_shadow()
777 if (svm->vmcb->control.next_rip != 0) { in skip_emulated_instruction()
779 svm->next_rip = svm->vmcb->control.next_rip; in skip_emulated_instruction()
828 svm->vmcb->control.event_inj = nr in svm_queue_exception()
832 svm->vmcb->control.event_inj_err = error_code; in svm_queue_exception()
1142 svm->vmcb->control.virt_ext |= LBR_CTL_ENABLE_MASK; in svm_enable_lbrv()
1153 svm->vmcb->control.virt_ext &= ~LBR_CTL_ENABLE_MASK; in svm_disable_lbrv()
1262 struct vmcb_control_area *control = &svm->vmcb->control; in grow_ple_window() local
1263 int old = control->pause_filter_count; in grow_ple_window()
1265 control->pause_filter_count = __grow_ple_window(old, in grow_ple_window()
1270 if (control->pause_filter_count != old) in grow_ple_window()
1274 control->pause_filter_count, old); in grow_ple_window()
1280 struct vmcb_control_area *control = &svm->vmcb->control; in shrink_ple_window() local
1281 int old = control->pause_filter_count; in shrink_ple_window()
1283 control->pause_filter_count = in shrink_ple_window()
1288 if (control->pause_filter_count != old) in shrink_ple_window()
1292 control->pause_filter_count, old); in shrink_ple_window()
1442 return svm->nested.hsave->control.tsc_offset; in svm_read_l1_tsc_offset()
1454 g_tsc_offset = svm->vmcb->control.tsc_offset - in svm_write_tsc_offset()
1455 svm->nested.hsave->control.tsc_offset; in svm_write_tsc_offset()
1456 svm->nested.hsave->control.tsc_offset = offset; in svm_write_tsc_offset()
1459 svm->vmcb->control.tsc_offset, in svm_write_tsc_offset()
1462 svm->vmcb->control.tsc_offset = offset + g_tsc_offset; in svm_write_tsc_offset()
1475 vmcb->control.avic_backing_page = bpa & AVIC_HPA_MASK; in avic_init_vmcb()
1476 vmcb->control.avic_logical_id = lpa & AVIC_HPA_MASK; in avic_init_vmcb()
1477 vmcb->control.avic_physical_id = ppa & AVIC_HPA_MASK; in avic_init_vmcb()
1478 vmcb->control.avic_physical_id |= AVIC_MAX_PHYSICAL_ID_COUNT; in avic_init_vmcb()
1479 vmcb->control.int_ctl |= AVIC_ENABLE_MASK; in avic_init_vmcb()
1484 struct vmcb_control_area *control = &svm->vmcb->control; in init_vmcb() local
1546 control->iopm_base_pa = __sme_set(iopm_base); in init_vmcb()
1547 control->msrpm_base_pa = __sme_set(__pa(svm->msrpm)); in init_vmcb()
1548 control->int_ctl = V_INTR_MASKING_MASK; in init_vmcb()
1587 control->nested_ctl |= SVM_NESTED_CTL_NP_ENABLE; in init_vmcb()
1602 control->pause_filter_count = pause_filter_count; in init_vmcb()
1604 control->pause_filter_thresh = pause_filter_thresh; in init_vmcb()
1620 svm->vmcb->control.virt_ext |= VIRTUAL_VMLOAD_VMSAVE_ENABLE_MASK; in init_vmcb()
1626 svm->vmcb->control.int_ctl |= V_GIF_ENABLE_MASK; in init_vmcb()
1630 svm->vmcb->control.nested_ctl |= SVM_NESTED_CTL_SEV_ENABLE; in init_vmcb()
2597 svm->vmcb->control.tlb_ctl = TLB_CONTROL_FLUSH_ALL_ASID; in new_asid()
2601 svm->vmcb->control.asid = sd->next_asid++; in new_asid()
2644 u64 fault_address = __sme_clr(svm->vmcb->control.exit_info_2); in pf_interception()
2645 u64 error_code = svm->vmcb->control.exit_info_1; in pf_interception()
2649 svm->vmcb->control.insn_bytes : NULL, in pf_interception()
2650 svm->vmcb->control.insn_len); in pf_interception()
2655 u64 fault_address = __sme_clr(svm->vmcb->control.exit_info_2); in npf_interception()
2656 u64 error_code = svm->vmcb->control.exit_info_1; in npf_interception()
2661 svm->vmcb->control.insn_bytes : NULL, in npf_interception()
2662 svm->vmcb->control.insn_len); in npf_interception()
2716 u32 error_code = svm->vmcb->control.exit_info_1; in gp_interception()
2817 u32 io_info = svm->vmcb->control.exit_info_1; /* address size bug? */ in io_interception()
2829 svm->next_rip = svm->vmcb->control.exit_info_2; in io_interception()
2888 svm->vmcb->control.nested_cr3 = __sme_set(root); in nested_svm_set_tdp_cr3()
2897 if (svm->vmcb->control.exit_code != SVM_EXIT_NPF) { in nested_svm_inject_npf_exit()
2902 svm->vmcb->control.exit_code = SVM_EXIT_NPF; in nested_svm_inject_npf_exit()
2903 svm->vmcb->control.exit_code_hi = 0; in nested_svm_inject_npf_exit()
2904 svm->vmcb->control.exit_info_1 = (1ULL << 32); in nested_svm_inject_npf_exit()
2905 svm->vmcb->control.exit_info_2 = fault->address; in nested_svm_inject_npf_exit()
2908 svm->vmcb->control.exit_info_1 &= ~0xffffffffULL; in nested_svm_inject_npf_exit()
2909 svm->vmcb->control.exit_info_1 |= fault->error_code; in nested_svm_inject_npf_exit()
2915 if (svm->vmcb->control.exit_info_1 & (2ULL << 32)) in nested_svm_inject_npf_exit()
2916 svm->vmcb->control.exit_info_1 &= ~1; in nested_svm_inject_npf_exit()
2967 svm->vmcb->control.exit_code = SVM_EXIT_EXCP_BASE + nr; in nested_svm_check_exception()
2968 svm->vmcb->control.exit_code_hi = 0; in nested_svm_check_exception()
2969 svm->vmcb->control.exit_info_1 = error_code; in nested_svm_check_exception()
2981 svm->vmcb->control.exit_info_2 = svm->vcpu.arch.apf.nested_apf_token; in nested_svm_check_exception()
2983 svm->vmcb->control.exit_info_2 = svm->vcpu.arch.cr2; in nested_svm_check_exception()
3009 svm->vmcb->control.exit_code = SVM_EXIT_INTR; in nested_svm_intr()
3010 svm->vmcb->control.exit_info_1 = 0; in nested_svm_intr()
3011 svm->vmcb->control.exit_info_2 = 0; in nested_svm_intr()
3037 svm->vmcb->control.exit_code = SVM_EXIT_NMI; in nested_svm_nmi()
3079 port = svm->vmcb->control.exit_info_1 >> 16; in nested_svm_intercept_ioio()
3080 size = (svm->vmcb->control.exit_info_1 & SVM_IOIO_SIZE_MASK) >> in nested_svm_intercept_ioio()
3104 write = svm->vmcb->control.exit_info_1 & 1; in nested_svm_exit_handled_msr()
3146 u32 exit_code = svm->vmcb->control.exit_code; in nested_svm_exit_special()
3175 u32 exit_code = svm->vmcb->control.exit_code; in nested_svm_intercept()
3239 struct vmcb_control_area *dst = &dst_vmcb->control; in copy_vmcb_control_area()
3240 struct vmcb_control_area *from = &from_vmcb->control; in copy_vmcb_control_area()
3274 trace_kvm_nested_vmexit_inject(vmcb->control.exit_code, in nested_svm_vmexit()
3275 vmcb->control.exit_info_1, in nested_svm_vmexit()
3276 vmcb->control.exit_info_2, in nested_svm_vmexit()
3277 vmcb->control.exit_int_info, in nested_svm_vmexit()
3278 vmcb->control.exit_int_info_err, in nested_svm_vmexit()
3311 nested_vmcb->control.int_ctl = vmcb->control.int_ctl; in nested_svm_vmexit()
3312 nested_vmcb->control.int_vector = vmcb->control.int_vector; in nested_svm_vmexit()
3313 nested_vmcb->control.int_state = vmcb->control.int_state; in nested_svm_vmexit()
3314 nested_vmcb->control.exit_code = vmcb->control.exit_code; in nested_svm_vmexit()
3315 nested_vmcb->control.exit_code_hi = vmcb->control.exit_code_hi; in nested_svm_vmexit()
3316 nested_vmcb->control.exit_info_1 = vmcb->control.exit_info_1; in nested_svm_vmexit()
3317 nested_vmcb->control.exit_info_2 = vmcb->control.exit_info_2; in nested_svm_vmexit()
3318 nested_vmcb->control.exit_int_info = vmcb->control.exit_int_info; in nested_svm_vmexit()
3319 nested_vmcb->control.exit_int_info_err = vmcb->control.exit_int_info_err; in nested_svm_vmexit()
3322 nested_vmcb->control.next_rip = vmcb->control.next_rip; in nested_svm_vmexit()
3332 if (vmcb->control.event_inj & SVM_EVTINJ_VALID) { in nested_svm_vmexit()
3333 struct vmcb_control_area *nc = &nested_vmcb->control; in nested_svm_vmexit()
3335 nc->exit_int_info = vmcb->control.event_inj; in nested_svm_vmexit()
3336 nc->exit_int_info_err = vmcb->control.event_inj_err; in nested_svm_vmexit()
3339 nested_vmcb->control.tlb_ctl = 0; in nested_svm_vmexit()
3340 nested_vmcb->control.event_inj = 0; in nested_svm_vmexit()
3341 nested_vmcb->control.event_inj_err = 0; in nested_svm_vmexit()
3345 nested_vmcb->control.int_ctl &= ~V_INTR_MASKING_MASK; in nested_svm_vmexit()
3350 svm->vcpu.arch.tsc_offset = svm->vmcb->control.tsc_offset; in nested_svm_vmexit()
3378 svm->vmcb->control.exit_int_info = 0; in nested_svm_vmexit()
3419 svm->vmcb->control.msrpm_base_pa = __sme_set(__pa(svm->nested.msrpm)); in nested_svm_vmrun_msrpm()
3426 if ((vmcb->control.intercept & (1ULL << INTERCEPT_VMRUN)) == 0) in nested_vmcb_checks()
3429 if (vmcb->control.asid == 0) in nested_vmcb_checks()
3432 if ((vmcb->control.nested_ctl & SVM_NESTED_CTL_NP_ENABLE) && in nested_vmcb_checks()
3447 if (nested_vmcb->control.nested_ctl & SVM_NESTED_CTL_NP_ENABLE) { in enter_svm_guest_mode()
3449 svm->nested.nested_cr3 = nested_vmcb->control.nested_cr3; in enter_svm_guest_mode()
3486 svm->nested.vmcb_msrpm = nested_vmcb->control.msrpm_base_pa & ~0x0fffULL; in enter_svm_guest_mode()
3487 svm->nested.vmcb_iopm = nested_vmcb->control.iopm_base_pa & ~0x0fffULL; in enter_svm_guest_mode()
3490 svm->nested.intercept_cr = nested_vmcb->control.intercept_cr; in enter_svm_guest_mode()
3491 svm->nested.intercept_dr = nested_vmcb->control.intercept_dr; in enter_svm_guest_mode()
3492 svm->nested.intercept_exceptions = nested_vmcb->control.intercept_exceptions; in enter_svm_guest_mode()
3493 svm->nested.intercept = nested_vmcb->control.intercept; in enter_svm_guest_mode()
3496 svm->vmcb->control.int_ctl = nested_vmcb->control.int_ctl | V_INTR_MASKING_MASK; in enter_svm_guest_mode()
3497 if (nested_vmcb->control.int_ctl & V_INTR_MASKING_MASK) in enter_svm_guest_mode()
3511 svm->vcpu.arch.tsc_offset += nested_vmcb->control.tsc_offset; in enter_svm_guest_mode()
3512 svm->vmcb->control.tsc_offset = svm->vcpu.arch.tsc_offset; in enter_svm_guest_mode()
3514 svm->vmcb->control.virt_ext = nested_vmcb->control.virt_ext; in enter_svm_guest_mode()
3515 svm->vmcb->control.int_vector = nested_vmcb->control.int_vector; in enter_svm_guest_mode()
3516 svm->vmcb->control.int_state = nested_vmcb->control.int_state; in enter_svm_guest_mode()
3517 svm->vmcb->control.event_inj = nested_vmcb->control.event_inj; in enter_svm_guest_mode()
3518 svm->vmcb->control.event_inj_err = nested_vmcb->control.event_inj_err; in enter_svm_guest_mode()
3553 nested_vmcb->control.exit_code = SVM_EXIT_ERR; in nested_svm_vmrun()
3554 nested_vmcb->control.exit_code_hi = 0; in nested_svm_vmrun()
3555 nested_vmcb->control.exit_info_1 = 0; in nested_svm_vmrun()
3556 nested_vmcb->control.exit_info_2 = 0; in nested_svm_vmrun()
3565 nested_vmcb->control.int_ctl, in nested_svm_vmrun()
3566 nested_vmcb->control.event_inj, in nested_svm_vmrun()
3567 nested_vmcb->control.nested_ctl); in nested_svm_vmrun()
3569 trace_kvm_nested_intercepts(nested_vmcb->control.intercept_cr & 0xffff, in nested_svm_vmrun()
3570 nested_vmcb->control.intercept_cr >> 16, in nested_svm_vmrun()
3571 nested_vmcb->control.intercept_exceptions, in nested_svm_vmrun()
3572 nested_vmcb->control.intercept); in nested_svm_vmrun()
3685 svm->vmcb->control.exit_code = SVM_EXIT_ERR; in vmrun_interception()
3686 svm->vmcb->control.exit_code_hi = 0; in vmrun_interception()
3687 svm->vmcb->control.exit_info_1 = 0; in vmrun_interception()
3688 svm->vmcb->control.exit_info_2 = 0; in vmrun_interception()
3733 svm->vmcb->control.int_ctl &= ~V_IRQ_MASK; in clgi_interception()
3784 int int_type = svm->vmcb->control.exit_int_info & in task_switch_interception()
3786 int int_vec = svm->vmcb->control.exit_int_info & SVM_EVTINJ_VEC_MASK; in task_switch_interception()
3788 svm->vmcb->control.exit_int_info & SVM_EXITINTINFO_TYPE_MASK; in task_switch_interception()
3790 svm->vmcb->control.exit_int_info & SVM_EXITINTINFO_VALID; in task_switch_interception()
3794 tss_selector = (u16)svm->vmcb->control.exit_info_1; in task_switch_interception()
3796 if (svm->vmcb->control.exit_info_2 & in task_switch_interception()
3799 else if (svm->vmcb->control.exit_info_2 & in task_switch_interception()
3813 if (svm->vmcb->control.exit_info_2 & in task_switch_interception()
3817 (u32)svm->vmcb->control.exit_info_2; in task_switch_interception()
3869 kvm_mmu_invlpg(&svm->vcpu, svm->vmcb->control.exit_info_1); in invlpg_interception()
3912 svm->vmcb->control.exit_code = SVM_EXIT_CR0_SEL_WRITE; in check_selective_cr0_intercepted()
3930 if (unlikely((svm->vmcb->control.exit_info_1 & CR_VALID) == 0)) in cr_interception()
3933 reg = svm->vmcb->control.exit_info_1 & SVM_EXITINFO_REG_MASK; in cr_interception()
3934 if (svm->vmcb->control.exit_code == SVM_EXIT_CR0_SEL_WRITE) in cr_interception()
3937 cr = svm->vmcb->control.exit_code - SVM_EXIT_READ_CR0; in cr_interception()
4011 reg = svm->vmcb->control.exit_info_1 & SVM_EXITINFO_REG_MASK; in dr_interception()
4012 dr = svm->vmcb->control.exit_code - SVM_EXIT_READ_DR0; in dr_interception()
4395 if (svm->vmcb->control.exit_info_1) in msr_interception()
4405 svm->vmcb->control.int_ctl &= ~V_IRQ_MASK; in interrupt_window_interception()
4449 u32 icrh = svm->vmcb->control.exit_info_1 >> 32; in avic_incomplete_ipi_interception()
4450 u32 icrl = svm->vmcb->control.exit_info_1; in avic_incomplete_ipi_interception()
4451 u32 id = svm->vmcb->control.exit_info_2 >> 32; in avic_incomplete_ipi_interception()
4452 u32 index = svm->vmcb->control.exit_info_2 & 0xFF; in avic_incomplete_ipi_interception()
4634 u32 offset = svm->vmcb->control.exit_info_1 & in avic_unaccel_trap_write()
4690 u32 offset = svm->vmcb->control.exit_info_1 & in avic_unaccelerated_access_interception()
4692 u32 vector = svm->vmcb->control.exit_info_2 & in avic_unaccelerated_access_interception()
4694 bool write = (svm->vmcb->control.exit_info_1 >> 32) & in avic_unaccelerated_access_interception()
4782 struct vmcb_control_area *control = &svm->vmcb->control; in dump_vmcb() local
4786 pr_err("%-20s%04x\n", "cr_read:", control->intercept_cr & 0xffff); in dump_vmcb()
4787 pr_err("%-20s%04x\n", "cr_write:", control->intercept_cr >> 16); in dump_vmcb()
4788 pr_err("%-20s%04x\n", "dr_read:", control->intercept_dr & 0xffff); in dump_vmcb()
4789 pr_err("%-20s%04x\n", "dr_write:", control->intercept_dr >> 16); in dump_vmcb()
4790 pr_err("%-20s%08x\n", "exceptions:", control->intercept_exceptions); in dump_vmcb()
4791 pr_err("%-20s%016llx\n", "intercepts:", control->intercept); in dump_vmcb()
4792 pr_err("%-20s%d\n", "pause filter count:", control->pause_filter_count); in dump_vmcb()
4794 control->pause_filter_thresh); in dump_vmcb()
4795 pr_err("%-20s%016llx\n", "iopm_base_pa:", control->iopm_base_pa); in dump_vmcb()
4796 pr_err("%-20s%016llx\n", "msrpm_base_pa:", control->msrpm_base_pa); in dump_vmcb()
4797 pr_err("%-20s%016llx\n", "tsc_offset:", control->tsc_offset); in dump_vmcb()
4798 pr_err("%-20s%d\n", "asid:", control->asid); in dump_vmcb()
4799 pr_err("%-20s%d\n", "tlb_ctl:", control->tlb_ctl); in dump_vmcb()
4800 pr_err("%-20s%08x\n", "int_ctl:", control->int_ctl); in dump_vmcb()
4801 pr_err("%-20s%08x\n", "int_vector:", control->int_vector); in dump_vmcb()
4802 pr_err("%-20s%08x\n", "int_state:", control->int_state); in dump_vmcb()
4803 pr_err("%-20s%08x\n", "exit_code:", control->exit_code); in dump_vmcb()
4804 pr_err("%-20s%016llx\n", "exit_info1:", control->exit_info_1); in dump_vmcb()
4805 pr_err("%-20s%016llx\n", "exit_info2:", control->exit_info_2); in dump_vmcb()
4806 pr_err("%-20s%08x\n", "exit_int_info:", control->exit_int_info); in dump_vmcb()
4807 pr_err("%-20s%08x\n", "exit_int_info_err:", control->exit_int_info_err); in dump_vmcb()
4808 pr_err("%-20s%lld\n", "nested_ctl:", control->nested_ctl); in dump_vmcb()
4809 pr_err("%-20s%016llx\n", "nested_cr3:", control->nested_cr3); in dump_vmcb()
4810 pr_err("%-20s%016llx\n", "avic_vapic_bar:", control->avic_vapic_bar); in dump_vmcb()
4811 pr_err("%-20s%08x\n", "event_inj:", control->event_inj); in dump_vmcb()
4812 pr_err("%-20s%08x\n", "event_inj_err:", control->event_inj_err); in dump_vmcb()
4813 pr_err("%-20s%lld\n", "virt_ext:", control->virt_ext); in dump_vmcb()
4814 pr_err("%-20s%016llx\n", "next_rip:", control->next_rip); in dump_vmcb()
4815 pr_err("%-20s%016llx\n", "avic_backing_page:", control->avic_backing_page); in dump_vmcb()
4816 pr_err("%-20s%016llx\n", "avic_logical_id:", control->avic_logical_id); in dump_vmcb()
4817 pr_err("%-20s%016llx\n", "avic_physical_id:", control->avic_physical_id); in dump_vmcb()
4892 struct vmcb_control_area *control = &to_svm(vcpu)->vmcb->control; in svm_get_exit_info() local
4894 *info1 = control->exit_info_1; in svm_get_exit_info()
4895 *info2 = control->exit_info_2; in svm_get_exit_info()
4902 u32 exit_code = svm->vmcb->control.exit_code; in handle_exit()
4922 svm->vmcb->control.exit_info_1, in handle_exit()
4923 svm->vmcb->control.exit_info_2, in handle_exit()
4924 svm->vmcb->control.exit_int_info, in handle_exit()
4925 svm->vmcb->control.exit_int_info_err, in handle_exit()
4939 if (svm->vmcb->control.exit_code == SVM_EXIT_ERR) { in handle_exit()
4942 = svm->vmcb->control.exit_code; in handle_exit()
4948 if (is_external_interrupt(svm->vmcb->control.exit_int_info) && in handle_exit()
4954 __func__, svm->vmcb->control.exit_int_info, in handle_exit()
4982 svm->vmcb->control.asid = asid; in pre_sev_run()
4996 svm->vmcb->control.tlb_ctl = TLB_CONTROL_FLUSH_ASID; in pre_sev_run()
5018 svm->vmcb->control.event_inj = SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_NMI; in svm_inject_nmi()
5026 struct vmcb_control_area *control; in svm_inject_irq() local
5029 control = &svm->vmcb->control; in svm_inject_irq()
5030 control->int_vector = irq; in svm_inject_irq()
5031 control->int_ctl &= ~V_INTR_PRIO_MASK; in svm_inject_irq()
5032 control->int_ctl |= V_IRQ_MASK | in svm_inject_irq()
5046 svm->vmcb->control.event_inj = vcpu->arch.interrupt.nr | in svm_set_irq()
5099 vmcb->control.int_ctl &= ~AVIC_ENABLE_MASK; in svm_refresh_apicv_exec_ctrl()
5328 ret = !(vmcb->control.int_state & SVM_INTERRUPT_SHADOW_MASK) && in svm_nmi_allowed()
5362 (vmcb->control.int_state & SVM_INTERRUPT_SHADOW_MASK)) in svm_interrupt_allowed()
5435 svm->vmcb->control.tlb_ctl = TLB_CONTROL_FLUSH_ASID; in svm_flush_tlb()
5444 invlpga(gva, svm->vmcb->control.asid); in svm_flush_tlb_gva()
5459 int cr8 = svm->vmcb->control.int_ctl & V_TPR_MASK; in sync_cr8_to_lapic()
5474 svm->vmcb->control.int_ctl &= ~V_TPR_MASK; in sync_lapic_to_cr8()
5475 svm->vmcb->control.int_ctl |= cr8 & V_TPR_MASK; in sync_lapic_to_cr8()
5482 u32 exitintinfo = svm->vmcb->control.exit_int_info; in svm_complete_interrupts()
5528 u32 err = svm->vmcb->control.exit_int_info_err; in svm_complete_interrupts()
5545 struct vmcb_control_area *control = &svm->vmcb->control; in svm_cancel_injection() local
5547 control->exit_int_info = control->event_inj; in svm_cancel_injection()
5548 control->exit_int_info_err = control->event_inj_err; in svm_cancel_injection()
5549 control->event_inj = 0; in svm_cancel_injection()
5574 if (svm->nmi_singlestep && svm->vmcb->control.event_inj) { in svm_vcpu_run()
5735 if (unlikely(svm->vmcb->control.exit_code == SVM_EXIT_NMI)) in svm_vcpu_run()
5742 if (unlikely(svm->vmcb->control.exit_code == SVM_EXIT_NMI)) in svm_vcpu_run()
5749 svm->vmcb->control.tlb_ctl = TLB_CONTROL_DO_NOTHING; in svm_vcpu_run()
5752 if (svm->vmcb->control.exit_code == SVM_EXIT_EXCP_BASE + PF_VECTOR) in svm_vcpu_run()
5764 if (unlikely(svm->vmcb->control.exit_code == in svm_vcpu_run()
5784 svm->vmcb->control.nested_cr3 = __sme_set(root); in set_tdp_cr3()
6042 vmcb->control.exit_info_1 = 1; in svm_check_intercept()
6044 vmcb->control.exit_info_1 = 0; in svm_check_intercept()
6081 vmcb->control.exit_info_1 = exit_info; in svm_check_intercept()
6082 vmcb->control.exit_info_2 = info->next_rip; in svm_check_intercept()
6092 vmcb->control.next_rip = info->next_rip; in svm_check_intercept()
6093 vmcb->control.exit_code = icpt_info.exit_code; in svm_check_intercept()
6146 svm->vmcb->control.exit_code = SVM_EXIT_SMI; in svm_smi_allowed()