Lines Matching refs:Sse
132 #define Sse (1<<18) /* SSE Vector instruction */ macro
1188 if (ctxt->d & Sse) { in decode_register_operand()
1239 if (ctxt->d & Sse) { in decode_modrm()
4511 I(Mmx, em_mov), I(Sse | Aligned, em_mov), N, I(Sse | Unaligned, em_mov),
4531 N, I(Sse, em_mov), N, N,
4737 GP(ModRM | DstReg | SrcMem | Mov | Sse, &pfx_0f_10_0f_11),
4738 GP(ModRM | DstMem | SrcReg | Mov | Sse, &pfx_0f_10_0f_11),
4750 GP(ModRM | DstReg | SrcMem | Mov | Sse, &pfx_0f_28_0f_29),
4751 GP(ModRM | DstMem | SrcReg | Mov | Sse, &pfx_0f_28_0f_29),
4752 N, GP(ModRM | DstMem | SrcReg | Mov | Sse, &pfx_0f_2b),
5284 (NotImpl|Stack|Op3264|Sse|Mmx|Intercept|CheckPerm|NearBranch| in x86_decode_insn()
5313 if (ctxt->d & Sse) in x86_decode_insn()
5457 (No64|Undefined|Sse|Mmx|Intercept|CheckPerm|Priv|Prot|String))) { in x86_emulate_insn()
5464 if (((ctxt->d & (Sse|Mmx)) && ((ops->get_cr(ctxt, 0) & X86_CR0_EM))) in x86_emulate_insn()
5465 || ((ctxt->d & Sse) && !(ops->get_cr(ctxt, 4) & X86_CR4_OSFXSR))) { in x86_emulate_insn()
5470 if ((ctxt->d & (Sse|Mmx)) && (ops->get_cr(ctxt, 0) & X86_CR0_TS)) { in x86_emulate_insn()