Lines Matching refs:rev
176 u32 rev, dummy; in __apply_microcode_amd() local
181 native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy); in __apply_microcode_amd()
182 if (rev != mc->hdr.patch_id) in __apply_microcode_amd()
205 u32 rev, dummy, *new_rev; in apply_microcode_early_amd() local
224 native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy); in apply_microcode_early_amd()
225 if (rev >= mc->hdr.patch_id) in apply_microcode_early_amd()
295 u32 *new_rev, rev, dummy; in load_ucode_amd_ap() local
305 native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy); in load_ucode_amd_ap()
308 if (*new_rev && rev < mc->hdr.patch_id) { in load_ucode_amd_ap()
351 u32 rev, dummy; in reload_ucode_amd() local
355 rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy); in reload_ucode_amd()
357 if (rev < mc->hdr.patch_id) { in reload_ucode_amd()
449 csig->rev = c->microcode; in collect_cpu_info_amd()
456 if (p && (p->patch_id == csig->rev)) in collect_cpu_info_amd()
459 pr_info("CPU%d: patch_level=0x%08x\n", cpu, csig->rev); in collect_cpu_info_amd()
508 u32 rev, dummy; in apply_microcode_amd() local
521 rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy); in apply_microcode_amd()
524 if (rev >= mc_amd->hdr.patch_id) { in apply_microcode_amd()
535 rev = mc_amd->hdr.patch_id; in apply_microcode_amd()
538 pr_info("CPU%d: new patch_level=0x%08x\n", cpu, rev); in apply_microcode_amd()
541 uci->cpu_sig.rev = rev; in apply_microcode_amd()
542 c->microcode = rev; in apply_microcode_amd()
546 boot_cpu_data.microcode = rev; in apply_microcode_amd()