Lines Matching refs:STATE0
22 #define STATE0 %ymm0 macro
74 morus1280_round STATE0, STATE1, STATE2, STATE3, STATE4, 13, MASK1
76 morus1280_round STATE1, STATE2, STATE3, STATE4, STATE0, 46, MASK2
78 morus1280_round STATE2, STATE3, STATE4, STATE0, STATE1, 38, MASK3
80 morus1280_round STATE3, STATE4, STATE0, STATE1, STATE2, 7, MASK2
82 morus1280_round STATE4, STATE0, STATE1, STATE2, STATE3, 4, MASK1
96 morus1280_round STATE0, STATE1, STATE2, STATE3, STATE4, 13, MASK1
97 morus1280_round STATE1, STATE2, STATE3, STATE4, STATE0, 46, MASK2
98 morus1280_round STATE2, STATE3, STATE4, STATE0, STATE1, 38, MASK3
99 morus1280_round STATE3, STATE4, STATE0, STATE1, STATE2, 7, MASK2
100 morus1280_round STATE4, STATE0, STATE1, STATE2, STATE3, 4, MASK1
251 vpxor STATE0, STATE0, STATE0
285 vmovdqu STATE0, (0 * 32)(%rdi)
306 vmovdqu (0 * 32)(%rdi), STATE0
337 vmovdqu STATE0, (0 * 32)(%rdi)
359 vmovdqu (0 * 32)(%rdi), STATE0
374 vpxor STATE0, T0, T0
393 vpxor STATE0, T0, T0
409 vmovdqu STATE0, (0 * 32)(%rdi)
428 vmovdqu (0 * 32)(%rdi), STATE0
438 vpxor STATE0, T0, T0
449 vmovdqu STATE0, (0 * 32)(%rdi)
470 vmovdqu (0 * 32)(%rdi), STATE0
484 vpxor STATE0, MSG, MSG
502 vpxor STATE0, MSG, MSG
518 vmovdqu STATE0, (0 * 32)(%rdi)
537 vmovdqu (0 * 32)(%rdi), STATE0
546 vpxor STATE0, MSG, MSG
565 vmovdqu STATE0, (0 * 32)(%rdi)
583 vmovdqu (0 * 32)(%rdi), STATE0
590 vpxor STATE0, STATE4, STATE4
613 vpxor STATE0, MSG, MSG