Lines Matching refs:CLKDEV_CON_ID
273 CLKDEV_CON_ID("rclk", &r_clk),
274 CLKDEV_CON_ID("extal", &extal_clk),
275 CLKDEV_CON_ID("fll_clk", &fll_clk),
276 CLKDEV_CON_ID("pll_clk", &pll_clk),
277 CLKDEV_CON_ID("div3_clk", &div3_clk),
280 CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
281 CLKDEV_CON_ID("shyway_clk", &div4_clks[DIV4_SH]),
282 CLKDEV_CON_ID("bus_clk", &div4_clks[DIV4_B]),
283 CLKDEV_CON_ID("peripheral_clk", &div4_clks[DIV4_P]),
284 CLKDEV_CON_ID("vpu_clk", &div4_clks[DIV4_M1]),
287 CLKDEV_CON_ID("video_clk", &div6_clks[DIV6_V]),
288 CLKDEV_CON_ID("fsia_clk", &div6_clks[DIV6_FA]),
289 CLKDEV_CON_ID("fsib_clk", &div6_clks[DIV6_FB]),
290 CLKDEV_CON_ID("irda_clk", &div6_clks[DIV6_I]),
291 CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_S]),
294 CLKDEV_CON_ID("tlb0", &mstp_clks[HWBLK_TLB]),
295 CLKDEV_CON_ID("ic0", &mstp_clks[HWBLK_IC]),
296 CLKDEV_CON_ID("oc0", &mstp_clks[HWBLK_OC]),
297 CLKDEV_CON_ID("rs0", &mstp_clks[HWBLK_RSMEM]),
298 CLKDEV_CON_ID("ilmem0", &mstp_clks[HWBLK_ILMEM]),
299 CLKDEV_CON_ID("l2c0", &mstp_clks[HWBLK_L2C]),
300 CLKDEV_CON_ID("fpu0", &mstp_clks[HWBLK_FPU]),
301 CLKDEV_CON_ID("intc0", &mstp_clks[HWBLK_INTC]),
303 CLKDEV_CON_ID("sh0", &mstp_clks[HWBLK_SHYWAY]),
304 CLKDEV_CON_ID("hudi0", &mstp_clks[HWBLK_HUDI]),
305 CLKDEV_CON_ID("ubc0", &mstp_clks[HWBLK_UBC]),
324 CLKDEV_CON_ID("rtc0", &mstp_clks[HWBLK_RTC]),
329 CLKDEV_CON_ID("atapi0", &mstp_clks[HWBLK_ATAPI]),
330 CLKDEV_CON_ID("tpu0", &mstp_clks[HWBLK_TPU]),
331 CLKDEV_CON_ID("irda0", &mstp_clks[HWBLK_IRDA]),
332 CLKDEV_CON_ID("tsif0", &mstp_clks[HWBLK_TSIF]),
335 CLKDEV_CON_ID("usb1", &mstp_clks[HWBLK_USB1]),
336 CLKDEV_CON_ID("usb0", &mstp_clks[HWBLK_USB0]),
337 CLKDEV_CON_ID("2dg0", &mstp_clks[HWBLK_2DG]),
340 CLKDEV_CON_ID("veu1", &mstp_clks[HWBLK_VEU1]),
342 CLKDEV_CON_ID("beu1", &mstp_clks[HWBLK_BEU1]),
343 CLKDEV_CON_ID("2ddmac0", &mstp_clks[HWBLK_2DDMAC]),
345 CLKDEV_CON_ID("jpu0", &mstp_clks[HWBLK_JPU]),
347 CLKDEV_CON_ID("beu0", &mstp_clks[HWBLK_BEU0]),
349 CLKDEV_CON_ID("veu0", &mstp_clks[HWBLK_VEU0]),
350 CLKDEV_CON_ID("vpu0", &mstp_clks[HWBLK_VPU]),