Lines Matching refs:C
52 #define C(x) PERF_COUNT_HW_CACHE_##x macro
56 [C(L1D)] = {
57 [C(OP_READ)] = {
58 [C(RESULT_ACCESS)] = RISCV_OP_UNSUPP,
59 [C(RESULT_MISS)] = RISCV_OP_UNSUPP,
61 [C(OP_WRITE)] = {
62 [C(RESULT_ACCESS)] = RISCV_OP_UNSUPP,
63 [C(RESULT_MISS)] = RISCV_OP_UNSUPP,
65 [C(OP_PREFETCH)] = {
66 [C(RESULT_ACCESS)] = RISCV_OP_UNSUPP,
67 [C(RESULT_MISS)] = RISCV_OP_UNSUPP,
70 [C(L1I)] = {
71 [C(OP_READ)] = {
72 [C(RESULT_ACCESS)] = RISCV_OP_UNSUPP,
73 [C(RESULT_MISS)] = RISCV_OP_UNSUPP,
75 [C(OP_WRITE)] = {
76 [C(RESULT_ACCESS)] = RISCV_OP_UNSUPP,
77 [C(RESULT_MISS)] = RISCV_OP_UNSUPP,
79 [C(OP_PREFETCH)] = {
80 [C(RESULT_ACCESS)] = RISCV_OP_UNSUPP,
81 [C(RESULT_MISS)] = RISCV_OP_UNSUPP,
84 [C(LL)] = {
85 [C(OP_READ)] = {
86 [C(RESULT_ACCESS)] = RISCV_OP_UNSUPP,
87 [C(RESULT_MISS)] = RISCV_OP_UNSUPP,
89 [C(OP_WRITE)] = {
90 [C(RESULT_ACCESS)] = RISCV_OP_UNSUPP,
91 [C(RESULT_MISS)] = RISCV_OP_UNSUPP,
93 [C(OP_PREFETCH)] = {
94 [C(RESULT_ACCESS)] = RISCV_OP_UNSUPP,
95 [C(RESULT_MISS)] = RISCV_OP_UNSUPP,
98 [C(DTLB)] = {
99 [C(OP_READ)] = {
100 [C(RESULT_ACCESS)] = RISCV_OP_UNSUPP,
101 [C(RESULT_MISS)] = RISCV_OP_UNSUPP,
103 [C(OP_WRITE)] = {
104 [C(RESULT_ACCESS)] = RISCV_OP_UNSUPP,
105 [C(RESULT_MISS)] = RISCV_OP_UNSUPP,
107 [C(OP_PREFETCH)] = {
108 [C(RESULT_ACCESS)] = RISCV_OP_UNSUPP,
109 [C(RESULT_MISS)] = RISCV_OP_UNSUPP,
112 [C(ITLB)] = {
113 [C(OP_READ)] = {
114 [C(RESULT_ACCESS)] = RISCV_OP_UNSUPP,
115 [C(RESULT_MISS)] = RISCV_OP_UNSUPP,
117 [C(OP_WRITE)] = {
118 [C(RESULT_ACCESS)] = RISCV_OP_UNSUPP,
119 [C(RESULT_MISS)] = RISCV_OP_UNSUPP,
121 [C(OP_PREFETCH)] = {
122 [C(RESULT_ACCESS)] = RISCV_OP_UNSUPP,
123 [C(RESULT_MISS)] = RISCV_OP_UNSUPP,
126 [C(BPU)] = {
127 [C(OP_READ)] = {
128 [C(RESULT_ACCESS)] = RISCV_OP_UNSUPP,
129 [C(RESULT_MISS)] = RISCV_OP_UNSUPP,
131 [C(OP_WRITE)] = {
132 [C(RESULT_ACCESS)] = RISCV_OP_UNSUPP,
133 [C(RESULT_MISS)] = RISCV_OP_UNSUPP,
135 [C(OP_PREFETCH)] = {
136 [C(RESULT_ACCESS)] = RISCV_OP_UNSUPP,
137 [C(RESULT_MISS)] = RISCV_OP_UNSUPP,