123 			    tsi108_read_reg(TSI108_PCI_OFFSET + TSI108_PCI_CSR);  in tsi108_clear_pci_error()
124 			tsi108_write_reg(TSI108_PCI_OFFSET + TSI108_PCI_CSR,  in tsi108_clear_pci_error()
251 	irp_cfg = tsi108_read_reg(TSI108_PCI_OFFSET + TSI108_PCI_IRP_CFG_CTL);  in tsi108_pci_int_mask()
255 	tsi108_write_reg(TSI108_PCI_OFFSET + TSI108_PCI_IRP_CFG_CTL, irp_cfg);  in tsi108_pci_int_mask()
257 	irp_cfg = tsi108_read_reg(TSI108_PCI_OFFSET + TSI108_PCI_IRP_CFG_CTL);  in tsi108_pci_int_mask()
265 	irp_cfg = tsi108_read_reg(TSI108_PCI_OFFSET + TSI108_PCI_IRP_CFG_CTL);  in tsi108_pci_int_unmask()
269 	tsi108_write_reg(TSI108_PCI_OFFSET + TSI108_PCI_IRP_CFG_CTL, irp_cfg);  in tsi108_pci_int_unmask()
275 	tsi108_write_reg(TSI108_PCI_OFFSET + TSI108_PCI_IRP_CFG_CTL,  in init_pci_source()
277 	tsi108_write_reg(TSI108_PCI_OFFSET + TSI108_PCI_IRP_ENABLE,  in init_pci_source()
291 	pci_irp_stat = tsi108_read_reg(TSI108_PCI_OFFSET + TSI108_PCI_IRP_STAT);  in get_pci_source()
297 		    tsi108_read_reg(TSI108_PCI_OFFSET +  in get_pci_source()
309 		temp = tsi108_read_reg(TSI108_PCI_OFFSET + TSI108_PCI_IRP_ENABLE);  in get_pci_source()
310 		tsi108_write_reg(TSI108_PCI_OFFSET + TSI108_PCI_IRP_ENABLE,  in get_pci_source()
313 		(void)tsi108_read_reg(TSI108_PCI_OFFSET + TSI108_PCI_IRP_ENABLE);  in get_pci_source()
320 		    tsi108_read_reg(TSI108_PCI_OFFSET + TSI108_PCI_IRP_STAT);  in get_pci_source()
322 		    tsi108_read_reg(TSI108_PCI_OFFSET + TSI108_PCI_IRP_INTAD);  in get_pci_source()
326 		    tsi108_read_reg(TSI108_PCI_OFFSET + TSI108_PCI_IRP_CFG_CTL);  in get_pci_source()
330 		    tsi108_read_reg(TSI108_PCI_OFFSET + TSI108_PCI_IRP_ENABLE);  in get_pci_source()
349 	tsi108_write_reg(TSI108_PCI_OFFSET + TSI108_PCI_IRP_ENABLE,  in tsi108_pci_irq_unmask()
350 			 tsi108_read_reg(TSI108_PCI_OFFSET +  in tsi108_pci_irq_unmask()