514 static inline void ipic_write(volatile u32 __iomem *base, unsigned int reg, u32 value)  in ipic_write()  function
535 	ipic_write(ipic->regs, ipic_info[src].mask, temp);  in ipic_unmask_irq()
551 	ipic_write(ipic->regs, ipic_info[src].mask, temp);  in ipic_mask_irq()
570 	ipic_write(ipic->regs, ipic_info[src].ack, temp);  in ipic_ack_irq()
590 	ipic_write(ipic->regs, ipic_info[src].mask, temp);  in ipic_mask_irq_and_ack()
593 	ipic_write(ipic->regs, ipic_info[src].ack, temp);  in ipic_mask_irq_and_ack()
653 		ipic_write(ipic->regs, IPIC_SECNR, vnew);  in ipic_set_irq_type()
727 	ipic_write(ipic->regs, IPIC_SICNR, 0x0);  in ipic_init()
744 	ipic_write(ipic->regs, IPIC_SICFR, temp);  in ipic_init()
750 	ipic_write(ipic->regs, IPIC_SERCR, temp);  in ipic_init()
760 	ipic_write(ipic->regs, IPIC_SEMSR, temp);  in ipic_init()
765 	ipic_write(ipic->regs, IPIC_SIMSR_H, 0);  in ipic_init()
766 	ipic_write(ipic->regs, IPIC_SIMSR_L, 0);  in ipic_init()
797 	ipic_write(ipic->regs, ipic_info[src].prio, temp);  in ipic_set_priority()
814 	ipic_write(ipic->regs, IPIC_SICFR, temp);  in ipic_set_highest_priority()
819 	ipic_write(primary_ipic->regs, IPIC_SIPRR_A, IPIC_PRIORITY_DEFAULT);  in ipic_set_default_priority()
820 	ipic_write(primary_ipic->regs, IPIC_SIPRR_B, IPIC_PRIORITY_DEFAULT);  in ipic_set_default_priority()
821 	ipic_write(primary_ipic->regs, IPIC_SIPRR_C, IPIC_PRIORITY_DEFAULT);  in ipic_set_default_priority()
822 	ipic_write(primary_ipic->regs, IPIC_SIPRR_D, IPIC_PRIORITY_DEFAULT);  in ipic_set_default_priority()
823 	ipic_write(primary_ipic->regs, IPIC_SMPRR_A, IPIC_PRIORITY_DEFAULT);  in ipic_set_default_priority()
824 	ipic_write(primary_ipic->regs, IPIC_SMPRR_B, IPIC_PRIORITY_DEFAULT);  in ipic_set_default_priority()
834 	ipic_write(ipic->regs, IPIC_SERMR, temp);  in ipic_enable_mcp()
844 	ipic_write(ipic->regs, IPIC_SERMR, temp);  in ipic_disable_mcp()
854 	ipic_write(primary_ipic->regs, IPIC_SERSR, mask);  in ipic_clear_mcp_status()
908 		ipic_write(ipic->regs, IPIC_SIMSR_H, 0);  in ipic_suspend()
909 		ipic_write(ipic->regs, IPIC_SIMSR_L, 0);  in ipic_suspend()
910 		ipic_write(ipic->regs, IPIC_SEMSR, 0);  in ipic_suspend()
911 		ipic_write(ipic->regs, IPIC_SERMR, 0);  in ipic_suspend()
921 	ipic_write(ipic->regs, IPIC_SICFR, ipic_saved_state.sicfr);  in ipic_resume()
922 	ipic_write(ipic->regs, IPIC_SIPRR_A, ipic_saved_state.siprr[0]);  in ipic_resume()
923 	ipic_write(ipic->regs, IPIC_SIPRR_D, ipic_saved_state.siprr[1]);  in ipic_resume()
924 	ipic_write(ipic->regs, IPIC_SIMSR_H, ipic_saved_state.simsr[0]);  in ipic_resume()
925 	ipic_write(ipic->regs, IPIC_SIMSR_L, ipic_saved_state.simsr[1]);  in ipic_resume()
926 	ipic_write(ipic->regs, IPIC_SICNR, ipic_saved_state.sicnr);  in ipic_resume()
927 	ipic_write(ipic->regs, IPIC_SMPRR_A, ipic_saved_state.smprr[0]);  in ipic_resume()
928 	ipic_write(ipic->regs, IPIC_SMPRR_B, ipic_saved_state.smprr[1]);  in ipic_resume()
929 	ipic_write(ipic->regs, IPIC_SEMSR, ipic_saved_state.semsr);  in ipic_resume()
930 	ipic_write(ipic->regs, IPIC_SECNR, ipic_saved_state.secnr);  in ipic_resume()
931 	ipic_write(ipic->regs, IPIC_SERMR, ipic_saved_state.sermr);  in ipic_resume()
932 	ipic_write(ipic->regs, IPIC_SERCR, ipic_saved_state.sercr);  in ipic_resume()