Lines Matching refs:pir
85 uint64_t pir = get_hard_smp_processor_id(cpu); in pnv_save_sprs_for_deep_states() local
88 rc = opal_slw_set_reg(pir, SPRN_HSPRG0, hsprg0_val); in pnv_save_sprs_for_deep_states()
92 rc = opal_slw_set_reg(pir, SPRN_LPCR, lpcr_val); in pnv_save_sprs_for_deep_states()
97 rc = opal_slw_set_reg(pir, P9_STOP_SPR_MSR, msr_val); in pnv_save_sprs_for_deep_states()
101 rc = opal_slw_set_reg(pir, in pnv_save_sprs_for_deep_states()
111 rc = opal_slw_set_reg(pir, SPRN_HMEER, hmeer_val); in pnv_save_sprs_for_deep_states()
115 rc = opal_slw_set_reg(pir, SPRN_HID0, hid0_val); in pnv_save_sprs_for_deep_states()
122 rc = opal_slw_set_reg(pir, SPRN_HID1, hid1_val); in pnv_save_sprs_for_deep_states()
126 rc = opal_slw_set_reg(pir, SPRN_HID4, hid4_val); in pnv_save_sprs_for_deep_states()
130 rc = opal_slw_set_reg(pir, SPRN_HID5, hid5_val); in pnv_save_sprs_for_deep_states()
463 u64 pir = get_hard_smp_processor_id(cpu); in pnv_program_cpu_hotplug_lpcr() local
472 opal_slw_set_reg(pir, SPRN_LPCR, lpcr_val); in pnv_program_cpu_hotplug_lpcr()