Lines Matching refs:pe
132 struct eeh_pe *pe; in pnv_eeh_ei_write() local
153 pe = eeh_pe_get(hose, pe_no, 0); in pnv_eeh_ei_write()
154 if (!pe) in pnv_eeh_ei_write()
158 ret = eeh_ops->err_inject(pe, type, func, addr, mask); in pnv_eeh_ei_write()
387 if (!edev || edev->pe) in pnv_eeh_probe()
457 edev->pe->state |= EEH_PE_CFG_RESTRICTED; in pnv_eeh_probe()
465 if (!(edev->pe->state & EEH_PE_PRI_BUS)) { in pnv_eeh_probe()
466 edev->pe->bus = pci_find_bus(hose->global_number, in pnv_eeh_probe()
468 if (edev->pe->bus) in pnv_eeh_probe()
469 edev->pe->state |= EEH_PE_PRI_BUS; in pnv_eeh_probe()
493 static int pnv_eeh_set_option(struct eeh_pe *pe, int option) in pnv_eeh_set_option() argument
495 struct pci_controller *hose = pe->phb; in pnv_eeh_set_option()
524 phb->freeze_pe(phb, pe->addr); in pnv_eeh_set_option()
528 rc = opal_pci_eeh_freeze_set(phb->opal_id, pe->addr, opt); in pnv_eeh_set_option()
532 pe->addr); in pnv_eeh_set_option()
541 return phb->unfreeze_pe(phb, pe->addr, opt); in pnv_eeh_set_option()
543 rc = opal_pci_eeh_freeze_clear(phb->opal_id, pe->addr, opt); in pnv_eeh_set_option()
547 pe->addr); in pnv_eeh_set_option()
561 static int pnv_eeh_get_pe_addr(struct eeh_pe *pe) in pnv_eeh_get_pe_addr() argument
563 return pe->addr; in pnv_eeh_get_pe_addr()
566 static void pnv_eeh_get_phb_diag(struct eeh_pe *pe) in pnv_eeh_get_phb_diag() argument
568 struct pnv_phb *phb = pe->phb->private_data; in pnv_eeh_get_phb_diag()
571 rc = opal_pci_get_phb_diag_data2(phb->opal_id, pe->data, in pnv_eeh_get_phb_diag()
575 __func__, rc, pe->phb->global_number); in pnv_eeh_get_phb_diag()
578 static int pnv_eeh_get_phb_state(struct eeh_pe *pe) in pnv_eeh_get_phb_state() argument
580 struct pnv_phb *phb = pe->phb->private_data; in pnv_eeh_get_phb_state()
587 pe->addr, in pnv_eeh_get_phb_state()
606 } else if (!(pe->state & EEH_PE_ISOLATED)) { in pnv_eeh_get_phb_state()
607 eeh_pe_state_mark(pe, EEH_PE_ISOLATED); in pnv_eeh_get_phb_state()
608 pnv_eeh_get_phb_diag(pe); in pnv_eeh_get_phb_state()
611 pnv_pci_dump_phb_diag_data(pe->phb, pe->data); in pnv_eeh_get_phb_state()
617 static int pnv_eeh_get_pe_state(struct eeh_pe *pe) in pnv_eeh_get_pe_state() argument
619 struct pnv_phb *phb = pe->phb->private_data; in pnv_eeh_get_pe_state()
631 if (pe->state & EEH_PE_RESET) { in pnv_eeh_get_pe_state()
644 fstate = phb->get_pe_state(phb, pe->addr); in pnv_eeh_get_pe_state()
647 pe->addr, in pnv_eeh_get_pe_state()
654 pe->addr); in pnv_eeh_get_pe_state()
691 pe->addr, fstate); in pnv_eeh_get_pe_state()
705 !(pe->state & EEH_PE_ISOLATED)) { in pnv_eeh_get_pe_state()
707 phb->freeze_pe(phb, pe->addr); in pnv_eeh_get_pe_state()
709 eeh_pe_state_mark(pe, EEH_PE_ISOLATED); in pnv_eeh_get_pe_state()
710 pnv_eeh_get_phb_diag(pe); in pnv_eeh_get_pe_state()
713 pnv_pci_dump_phb_diag_data(pe->phb, pe->data); in pnv_eeh_get_pe_state()
729 static int pnv_eeh_get_state(struct eeh_pe *pe, int *delay) in pnv_eeh_get_state() argument
733 if (pe->type & EEH_PE_PHB) in pnv_eeh_get_state()
734 ret = pnv_eeh_get_phb_state(pe); in pnv_eeh_get_state()
736 ret = pnv_eeh_get_pe_state(pe); in pnv_eeh_get_state()
1050 static int pnv_eeh_reset_vf_pe(struct eeh_pe *pe, int option) in pnv_eeh_reset_vf_pe() argument
1057 edev = list_first_entry_or_null(&pe->edevs, struct eeh_dev, list); in pnv_eeh_reset_vf_pe()
1081 static int pnv_eeh_reset(struct eeh_pe *pe, int option) in pnv_eeh_reset() argument
1083 struct pci_controller *hose = pe->phb; in pnv_eeh_reset()
1102 if (pe->type & EEH_PE_PHB) in pnv_eeh_reset()
1126 if (pe->type & EEH_PE_VF) in pnv_eeh_reset()
1127 return pnv_eeh_reset_vf_pe(pe, option); in pnv_eeh_reset()
1129 bus = eeh_pe_bus_get(pe); in pnv_eeh_reset()
1132 __func__, pe->phb->global_number, pe->addr); in pnv_eeh_reset()
1158 static int pnv_eeh_wait_state(struct eeh_pe *pe, int max_wait) in pnv_eeh_wait_state() argument
1164 ret = pnv_eeh_get_state(pe, &mwait); in pnv_eeh_wait_state()
1176 __func__, pe->addr, max_wait); in pnv_eeh_wait_state()
1196 static int pnv_eeh_get_log(struct eeh_pe *pe, int severity, in pnv_eeh_get_log() argument
1200 pnv_pci_dump_phb_diag_data(pe->phb, pe->data); in pnv_eeh_get_log()
1213 static int pnv_eeh_configure_bridge(struct eeh_pe *pe) in pnv_eeh_configure_bridge() argument
1230 static int pnv_eeh_err_inject(struct eeh_pe *pe, int type, int func, in pnv_eeh_err_inject() argument
1233 struct pci_controller *hose = pe->phb; in pnv_eeh_err_inject()
1259 rc = opal_pci_err_inject(phb->opal_id, pe->addr, in pnv_eeh_err_inject()
1265 hose->global_number, pe->addr); in pnv_eeh_err_inject()
1276 if (!edev || !edev->pe) in pnv_eeh_cfg_blocked()
1284 if (edev->physfn && (edev->pe->state & EEH_PE_RESET)) in pnv_eeh_cfg_blocked()
1287 if (edev->pe->state & EEH_PE_CFG_BLOCKED) in pnv_eeh_cfg_blocked()
1401 u16 pe_no, struct eeh_pe **pe) in pnv_eeh_get_pe() argument
1426 *pe = dev_pe; in pnv_eeh_get_pe()
1445 *pe = dev_pe; in pnv_eeh_get_pe()
1466 static int pnv_eeh_next_error(struct eeh_pe **pe) in pnv_eeh_next_error() argument
1534 *pe = phb_pe; in pnv_eeh_next_error()
1542 *pe = phb_pe; in pnv_eeh_next_error()
1565 be64_to_cpu(frozen_pe_no), pe)) { in pnv_eeh_next_error()
1583 } else if ((*pe)->state & EEH_PE_ISOLATED || in pnv_eeh_next_error()
1584 eeh_pe_passed(*pe)) { in pnv_eeh_next_error()
1589 (*pe)->addr, in pnv_eeh_next_error()
1590 (*pe)->phb->global_number); in pnv_eeh_next_error()
1593 eeh_pe_loc_get(*pe), in pnv_eeh_next_error()
1613 !((*pe)->state & EEH_PE_ISOLATED)) { in pnv_eeh_next_error()
1614 eeh_pe_state_mark(*pe, EEH_PE_ISOLATED); in pnv_eeh_next_error()
1615 pnv_eeh_get_phb_diag(*pe); in pnv_eeh_next_error()
1618 pnv_pci_dump_phb_diag_data((*pe)->phb, in pnv_eeh_next_error()
1619 (*pe)->data); in pnv_eeh_next_error()
1627 parent_pe = (*pe)->parent; in pnv_eeh_next_error()
1636 *pe = parent_pe; in pnv_eeh_next_error()
1643 eeh_pe_state_mark(*pe, EEH_PE_ISOLATED); in pnv_eeh_next_error()