188 	switch (in_be64(&priv2->mfc_control_RW) &  in save_mfc_cntl()
191 		POLL_WHILE_FALSE((in_be64(&priv2->mfc_control_RW) &  in save_mfc_cntl()
198 				in_be64(&priv2->mfc_control_RW) |  in save_mfc_cntl()
203 		POLL_WHILE_FALSE((in_be64(&priv2->mfc_control_RW) &  in save_mfc_cntl()
208 				in_be64(&priv2->mfc_control_RW) &  in save_mfc_cntl()
274 	csa->priv2.mfc_control_RW |= in_be64(&priv2->mfc_control_RW) & mask;  in save_mfc_stopped_status()
318 	POLL_WHILE_TRUE(in_be64(&prob->spc_mssync_RW) & MS_SYNC_PENDING);  in do_mfc_mssync()
356 	if ((in_be64(&priv2->mfc_control_RW) & MFC_CNTL_DMA_QUEUES_EMPTY) == 0) {  in save_mfc_queues()
359 			    in_be64(&priv2->puq[i].mfc_cq_data0_RW);  in save_mfc_queues()
361 			    in_be64(&priv2->puq[i].mfc_cq_data1_RW);  in save_mfc_queues()
363 			    in_be64(&priv2->puq[i].mfc_cq_data2_RW);  in save_mfc_queues()
365 			    in_be64(&priv2->puq[i].mfc_cq_data3_RW);  in save_mfc_queues()
369 			    in_be64(&priv2->spuq[i].mfc_cq_data0_RW);  in save_mfc_queues()
371 			    in_be64(&priv2->spuq[i].mfc_cq_data1_RW);  in save_mfc_queues()
373 			    in_be64(&priv2->spuq[i].mfc_cq_data2_RW);  in save_mfc_queues()
375 			    in_be64(&priv2->spuq[i].mfc_cq_data3_RW);  in save_mfc_queues()
424 	    in_be64(&priv2->spu_tag_status_query_RW);  in save_mfc_csr_tsq()
435 	csa->priv2.spu_cmd_buf1_RW = in_be64(&priv2->spu_cmd_buf1_RW);  in save_mfc_csr_cmd()
436 	csa->priv2.spu_cmd_buf2_RW = in_be64(&priv2->spu_cmd_buf2_RW);  in save_mfc_csr_cmd()
447 	csa->priv2.spu_atomic_status_RW = in_be64(&priv2->spu_atomic_status_RW);  in save_mfc_csr_ato()
492 	POLL_WHILE_FALSE((in_be64(&priv2->mfc_control_RW) &  in wait_purge_complete()
532 	csa->priv2.spu_privcntl_RW = in_be64(&priv2->spu_privcntl_RW);  in save_spu_privcntl()
554 	csa->priv2.spu_lslr_RW = in_be64(&priv2->spu_lslr_RW);  in save_spu_lslr()
576 	csa->priv2.spu_cfg_RW = in_be64(&priv2->spu_cfg_RW);  in save_spu_cfg()
626 	csa->priv2.puint_mb_R = in_be64(&priv2->puint_mb_R);  in save_ppuint_mb()
640 	csa->spu_chnldata_RW[1] = in_be64(&priv2->spu_chnldata_RW);  in save_ch_part1()
647 		csa->spu_chnldata_RW[idx] = in_be64(&priv2->spu_chnldata_RW);  in save_ch_part1()
648 		csa->spu_chnlcnt_RW[idx] = in_be64(&priv2->spu_chnlcnt_RW);  in save_ch_part1()
665 	csa->spu_chnlcnt_RW[29] = in_be64(&priv2->spu_chnlcnt_RW);  in save_spu_mb()
667 		csa->spu_mailbox_data[i] = in_be64(&priv2->spu_chnldata_RW);  in save_spu_mb()
682 	csa->spu_chnlcnt_RW[21] = in_be64(&priv2->spu_chnlcnt_RW);  in save_mfc_cmd()
998 	POLL_WHILE_FALSE((in_be64(&priv2->mfc_control_RW) &  in wait_suspend_mfc_complete()
1696 		dummy = in_be64(&priv2->puint_mb_R);  in check_ppuint_mb_stat()