239                   struct mpc52xx_pci __iomem *pci_regs, phys_addr_t pci_phys)  in mpc52xx_pci_setup()  argument
245 	pr_debug("mpc52xx_pci_setup(hose=%p, pci_regs=%p)\n", hose, pci_regs);  in mpc52xx_pci_setup()
249 	hose->cfg_addr = &pci_regs->car;  in mpc52xx_pci_setup()
253 	tmp = in_be32(&pci_regs->scr);  in mpc52xx_pci_setup()
255 	out_be32(&pci_regs->scr, tmp);  in mpc52xx_pci_setup()
265 		out_be32(&pci_regs->iw0btar,  in mpc52xx_pci_setup()
279 		out_be32(&pci_regs->iw1btar,  in mpc52xx_pci_setup()
300 	out_be32(&pci_regs->iw2btar,  in mpc52xx_pci_setup()
307 	out_be32(&pci_regs->iwcr, MPC52xx_PCI_IWCR_PACK(iwcr0, iwcr1, iwcr2));  in mpc52xx_pci_setup()
311 	out_be32(&pci_regs->tbatr0, MPC52xx_PCI_TBATR_ENABLE | pci_phys);  in mpc52xx_pci_setup()
312 	out_be32(&pci_regs->bar0, PCI_BASE_ADDRESS_MEM_PREFETCH | pci_phys);  in mpc52xx_pci_setup()
315 	out_be32(&pci_regs->tbatr1, MPC52xx_PCI_TBATR_ENABLE);  in mpc52xx_pci_setup()
316 	out_be32(&pci_regs->bar1, PCI_BASE_ADDRESS_MEM_PREFETCH);  in mpc52xx_pci_setup()
318 	out_be32(&pci_regs->tcr, MPC52xx_PCI_TCR_LD | MPC52xx_PCI_TCR_WCT8);  in mpc52xx_pci_setup()
320 	tmp = in_be32(&pci_regs->gscr);  in mpc52xx_pci_setup()
326 	out_be32(&pci_regs->gscr, tmp | MPC52xx_PCI_GSCR_PR);  in mpc52xx_pci_setup()
331 	out_be32(&pci_regs->gscr, tmp & ~MPC52xx_PCI_GSCR_PR);  in mpc52xx_pci_setup()
367 	struct mpc52xx_pci __iomem *pci_regs;  in mpc52xx_add_bridge()  local
405 	pci_regs = ioremap(rsrc.start, resource_size(&rsrc));  in mpc52xx_add_bridge()
406 	if (!pci_regs)  in mpc52xx_add_bridge()
413 	mpc52xx_pci_setup(hose, pci_regs, rsrc.start);  in mpc52xx_add_bridge()