Lines Matching refs:C
315 #define C(x) PERF_COUNT_HW_CACHE_##x macro
322 static int power9_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
323 [ C(L1D) ] = {
324 [ C(OP_READ) ] = {
325 [ C(RESULT_ACCESS) ] = PM_LD_REF_L1,
326 [ C(RESULT_MISS) ] = PM_LD_MISS_L1_FIN,
328 [ C(OP_WRITE) ] = {
329 [ C(RESULT_ACCESS) ] = 0,
330 [ C(RESULT_MISS) ] = PM_ST_MISS_L1,
332 [ C(OP_PREFETCH) ] = {
333 [ C(RESULT_ACCESS) ] = PM_L1_PREF,
334 [ C(RESULT_MISS) ] = 0,
337 [ C(L1I) ] = {
338 [ C(OP_READ) ] = {
339 [ C(RESULT_ACCESS) ] = PM_INST_FROM_L1,
340 [ C(RESULT_MISS) ] = PM_L1_ICACHE_MISS,
342 [ C(OP_WRITE) ] = {
343 [ C(RESULT_ACCESS) ] = PM_L1_DEMAND_WRITE,
344 [ C(RESULT_MISS) ] = -1,
346 [ C(OP_PREFETCH) ] = {
347 [ C(RESULT_ACCESS) ] = PM_IC_PREF_WRITE,
348 [ C(RESULT_MISS) ] = 0,
351 [ C(LL) ] = {
352 [ C(OP_READ) ] = {
353 [ C(RESULT_ACCESS) ] = PM_DATA_FROM_L3,
354 [ C(RESULT_MISS) ] = PM_DATA_FROM_L3MISS,
356 [ C(OP_WRITE) ] = {
357 [ C(RESULT_ACCESS) ] = PM_L2_ST,
358 [ C(RESULT_MISS) ] = PM_L2_ST_MISS,
360 [ C(OP_PREFETCH) ] = {
361 [ C(RESULT_ACCESS) ] = PM_L3_PREF_ALL,
362 [ C(RESULT_MISS) ] = 0,
365 [ C(DTLB) ] = {
366 [ C(OP_READ) ] = {
367 [ C(RESULT_ACCESS) ] = 0,
368 [ C(RESULT_MISS) ] = PM_DTLB_MISS,
370 [ C(OP_WRITE) ] = {
371 [ C(RESULT_ACCESS) ] = -1,
372 [ C(RESULT_MISS) ] = -1,
374 [ C(OP_PREFETCH) ] = {
375 [ C(RESULT_ACCESS) ] = -1,
376 [ C(RESULT_MISS) ] = -1,
379 [ C(ITLB) ] = {
380 [ C(OP_READ) ] = {
381 [ C(RESULT_ACCESS) ] = 0,
382 [ C(RESULT_MISS) ] = PM_ITLB_MISS,
384 [ C(OP_WRITE) ] = {
385 [ C(RESULT_ACCESS) ] = -1,
386 [ C(RESULT_MISS) ] = -1,
388 [ C(OP_PREFETCH) ] = {
389 [ C(RESULT_ACCESS) ] = -1,
390 [ C(RESULT_MISS) ] = -1,
393 [ C(BPU) ] = {
394 [ C(OP_READ) ] = {
395 [ C(RESULT_ACCESS) ] = PM_BR_CMPL,
396 [ C(RESULT_MISS) ] = PM_BR_MPRED_CMPL,
398 [ C(OP_WRITE) ] = {
399 [ C(RESULT_ACCESS) ] = -1,
400 [ C(RESULT_MISS) ] = -1,
402 [ C(OP_PREFETCH) ] = {
403 [ C(RESULT_ACCESS) ] = -1,
404 [ C(RESULT_MISS) ] = -1,
407 [ C(NODE) ] = {
408 [ C(OP_READ) ] = {
409 [ C(RESULT_ACCESS) ] = -1,
410 [ C(RESULT_MISS) ] = -1,
412 [ C(OP_WRITE) ] = {
413 [ C(RESULT_ACCESS) ] = -1,
414 [ C(RESULT_MISS) ] = -1,
416 [ C(OP_PREFETCH) ] = {
417 [ C(RESULT_ACCESS) ] = -1,
418 [ C(RESULT_MISS) ] = -1,
423 #undef C