Lines Matching refs:r10
84 ld r10,TI_FLAGS(r11)
85 std r10,TI_FLAGS(r12)
86 ld r10,TI_PREEMPT(r11)
87 std r10,TI_PREEMPT(r12)
88 ld r10,TI_TASK(r11)
89 std r10,TI_TASK(r12)
97 mfspr r10,SPRN_SPRG_TLB_EXFRAME
98 add r10,r10,r12
99 mtspr SPRN_SPRG_TLB_EXFRAME,r10
105 mfspr r10,SPRN_SRR0
106 SPECIAL_EXC_STORE(r10,SRR0)
107 mfspr r10,SPRN_SRR1
108 SPECIAL_EXC_STORE(r10,SRR1)
109 mfspr r10,SPRN_SPRG_GEN_SCRATCH
110 SPECIAL_EXC_STORE(r10,SPRG_GEN)
111 mfspr r10,SPRN_SPRG_TLB_SCRATCH
112 SPECIAL_EXC_STORE(r10,SPRG_TLB)
113 mfspr r10,SPRN_MAS0
114 SPECIAL_EXC_STORE(r10,MAS0)
115 mfspr r10,SPRN_MAS1
116 SPECIAL_EXC_STORE(r10,MAS1)
117 mfspr r10,SPRN_MAS2
118 SPECIAL_EXC_STORE(r10,MAS2)
119 mfspr r10,SPRN_MAS3
120 SPECIAL_EXC_STORE(r10,MAS3)
121 mfspr r10,SPRN_MAS6
122 SPECIAL_EXC_STORE(r10,MAS6)
123 mfspr r10,SPRN_MAS7
124 SPECIAL_EXC_STORE(r10,MAS7)
126 mfspr r10,SPRN_MAS5
127 SPECIAL_EXC_STORE(r10,MAS5)
128 mfspr r10,SPRN_MAS8
129 SPECIAL_EXC_STORE(r10,MAS8)
132 li r10,0
133 mtspr SPRN_MAS5,r10
134 mtspr SPRN_MAS8,r10
138 mfspr r10,SPRN_DEAR
139 SPECIAL_EXC_STORE(r10,DEAR)
140 mfspr r10,SPRN_ESR
141 SPECIAL_EXC_STORE(r10,ESR)
143 lbz r10,PACAIRQSOFTMASK(r13)
144 SPECIAL_EXC_STORE(r10,SOFTE)
145 ld r10,_NIP(r1)
146 SPECIAL_EXC_STORE(r10,CSRR0)
147 ld r10,_MSR(r1)
148 SPECIAL_EXC_STORE(r10,CSRR1)
161 mfspr r10,SPRN_SPRG_TLB_EXFRAME
162 sub r10,r10,r12
163 mtspr SPRN_SPRG_TLB_EXFRAME,r10
183 SPECIAL_EXC_LOAD(r10,SRR0)
184 mtspr SPRN_SRR0,r10
185 SPECIAL_EXC_LOAD(r10,SRR1)
186 mtspr SPRN_SRR1,r10
187 SPECIAL_EXC_LOAD(r10,SPRG_GEN)
188 mtspr SPRN_SPRG_GEN_SCRATCH,r10
189 SPECIAL_EXC_LOAD(r10,SPRG_TLB)
190 mtspr SPRN_SPRG_TLB_SCRATCH,r10
191 SPECIAL_EXC_LOAD(r10,MAS0)
192 mtspr SPRN_MAS0,r10
193 SPECIAL_EXC_LOAD(r10,MAS1)
194 mtspr SPRN_MAS1,r10
195 SPECIAL_EXC_LOAD(r10,MAS2)
196 mtspr SPRN_MAS2,r10
197 SPECIAL_EXC_LOAD(r10,MAS3)
198 mtspr SPRN_MAS3,r10
199 SPECIAL_EXC_LOAD(r10,MAS6)
200 mtspr SPRN_MAS6,r10
201 SPECIAL_EXC_LOAD(r10,MAS7)
202 mtspr SPRN_MAS7,r10
204 SPECIAL_EXC_LOAD(r10,MAS5)
205 mtspr SPRN_MAS5,r10
206 SPECIAL_EXC_LOAD(r10,MAS8)
207 mtspr SPRN_MAS8,r10
228 SPECIAL_EXC_LOAD(r10,IRQHAPPENED)
229 stb r10,PACAIRQHAPPENED(r13)
231 SPECIAL_EXC_LOAD(r10,DEAR)
232 mtspr SPRN_DEAR,r10
233 SPECIAL_EXC_LOAD(r10,ESR)
234 mtspr SPRN_ESR,r10
241 ld r10,_CTR(r1)
243 mtctr r10
251 ld r10,_LINK(r1)
254 mtlr r10
257 ld r10,GPR10(r1)
262 std r10,\paca_ex+EX_R10(r13);
264 ld r10,_NIP(r1)
268 mtspr \srr0,r10
270 ld r10,\paca_ex+EX_R10(r13)
287 std r10,PACA_EX##type+EX_R10(r13); \
289 mfcr r10; /* save CR */ \
292 stw r10,PACA_EX##type+EX_CR(r13); /* save old CR in the PACA */ \
296 andi. r10,r11,MSR_PR; /* save stack pointer */ \
301 mfspr r10,SPRN_##type##_SRR0; /* read SRR0 before touching stack */
355 lbz r10,PACAIRQSOFTMASK(r13); /* are irqs soft-masked? */ \
356 andi. r10,r10,IRQS_DISABLED; /* yes -> go out of line */ \
387 std r10,_NIP(r1); /* save SRR0 to stackframe */ \
390 ACCOUNT_CPU_USER_ENTRY(r13,r10,r11);/* accounting (uses cr0+eq) */ \
400 lwz r10,excf+EX_CR(r13); /* load orig CR back from PACA */ \
412 std r10,_CCR(r1); /* store orig CR in stackframe */ \
484 ld r10,TI_LOCAL_FLAGS(r11); \
485 andi. r9,r10,_TLF_NAPPING; \
488 rlwinm r7,r10,0,~_TLF_NAPPING; \
588 mr r14,r10
747 cmpld cr0,r10,r14
748 cmpld cr1,r10,r15
757 lwz r10,PACA_EXCRIT+EX_CR(r13) /* restore registers */
761 mtcr r10
762 ld r10,PACA_EXCRIT+EX_R10(r13) /* restore registers */
817 cmpld cr0,r10,r14
818 cmpld cr1,r10,r15
827 lwz r10,PACA_EXDBG+EX_CR(r13) /* restore registers */
831 mtcr r10
832 ld r10,PACA_EXDBG+EX_R10(r13) /* restore registers */
952 lbz r10,PACAIRQHAPPENED(r13)
954 ori r10,r10,\paca_irq | PACA_IRQ_HARD_DIS
956 ori r10,r10,\paca_irq
958 stb r10,PACAIRQHAPPENED(r13)
961 rldicl r10,r11,48,1 /* clear MSR_EE */
962 rotldi r11,r10,16
968 ld r10,PACA_EXGEN+EX_R10(r13)
980 ACK_DEC(r10);
984 ACK_FIT(r10);
1006 mflr r10
1076 ld r10,_MSR(r1)
1078 andi. r6,r10,MSR_PR
1081 ACCOUNT_CPU_USER_EXIT(r13, r10, r11)
1088 ld r10,_CTR(r1)
1092 mtctr r10
1095 ld r10,GPR10(r1)
1100 std r10,PACA_EXGEN+EX_R10(r13);
1102 ld r10,_NIP(r1)
1106 mtspr SPRN_SRR0,r10
1108 ld r10,PACA_EXGEN+EX_R10(r13)
1153 mfspr r10,SPRN_SRR0; /* read SRR0 before touching stack */
1156 std r10,_NIP(r1)
1158 ld r10,PACA_EXGEN+EX_R1(r13) /* FIXME for crit & mcheck */
1160 std r10,GPR1(r1)
1162 mfspr r10,SPRN_DEAR
1164 std r10,_DAR(r1)
1178 mflr r10
1181 std r10,_LINK(r1)
1457 rlwinm r10,r4,8,0xff
1458 addi r10,r10,-1 /* Get inner loop mask */
1474 and r4,r4,r10
1484 and. r4,r3,r10