Lines Matching refs:eeh_ops

729 	eeh_ops->read_config(pdn, cap + PCI_EXP_SLTSTA, 2, &val);  in eeh_bridge_check_link()
736 eeh_ops->read_config(pdn, cap + PCI_EXP_SLTCAP, 2, &val); in eeh_bridge_check_link()
738 eeh_ops->read_config(pdn, cap + PCI_EXP_SLTCTL, 2, &val); in eeh_bridge_check_link()
743 eeh_ops->write_config(pdn, cap + PCI_EXP_SLTCTL, 2, val); in eeh_bridge_check_link()
749 eeh_ops->read_config(pdn, cap + PCI_EXP_LNKCTL, 2, &val); in eeh_bridge_check_link()
751 eeh_ops->write_config(pdn, cap + PCI_EXP_LNKCTL, 2, val); in eeh_bridge_check_link()
754 eeh_ops->read_config(pdn, cap + PCI_EXP_LNKCAP, 4, &val); in eeh_bridge_check_link()
767 eeh_ops->read_config(pdn, cap + PCI_EXP_LNKSTA, 2, &val); in eeh_bridge_check_link()
792 eeh_ops->write_config(pdn, i*4, 4, edev->config_space[i]); in eeh_restore_bridge_bars()
794 eeh_ops->write_config(pdn, 14*4, 4, edev->config_space[14]); in eeh_restore_bridge_bars()
797 eeh_ops->write_config(pdn, PCI_CACHE_LINE_SIZE, 1, in eeh_restore_bridge_bars()
799 eeh_ops->write_config(pdn, PCI_LATENCY_TIMER, 1, in eeh_restore_bridge_bars()
802 eeh_ops->write_config(pdn, 15*4, 4, edev->config_space[15]); in eeh_restore_bridge_bars()
805 eeh_ops->write_config(pdn, PCI_COMMAND, 4, edev->config_space[1] | in eeh_restore_bridge_bars()
819 eeh_ops->write_config(pdn, i*4, 4, edev->config_space[i]); in eeh_restore_device_bars()
821 eeh_ops->write_config(pdn, 12*4, 4, edev->config_space[12]); in eeh_restore_device_bars()
823 eeh_ops->write_config(pdn, PCI_CACHE_LINE_SIZE, 1, in eeh_restore_device_bars()
825 eeh_ops->write_config(pdn, PCI_LATENCY_TIMER, 1, in eeh_restore_device_bars()
829 eeh_ops->write_config(pdn, 15*4, 4, edev->config_space[15]); in eeh_restore_device_bars()
835 eeh_ops->read_config(pdn, PCI_COMMAND, 4, &cmd); in eeh_restore_device_bars()
844 eeh_ops->write_config(pdn, PCI_COMMAND, 4, cmd); in eeh_restore_device_bars()
866 if (eeh_ops->restore_config && pdn) in eeh_restore_one_device_bars()
867 eeh_ops->restore_config(pdn); in eeh_restore_one_device_bars()