29 #define MIPS_R_AT	1  macro
511 			gen_imm_to_reg(insn, MIPS_R_AT, ctx);  in gen_imm_insn()
515 				emit_instr(ctx, and, dst, dst, MIPS_R_AT);  in gen_imm_insn()
519 				emit_instr(ctx, or, dst, dst, MIPS_R_AT);  in gen_imm_insn()
523 				emit_instr(ctx, xor, dst, dst, MIPS_R_AT);  in gen_imm_insn()
526 				emit_instr(ctx, daddu, dst, dst, MIPS_R_AT);  in gen_imm_insn()
529 				emit_instr(ctx, dsubu, dst, dst, MIPS_R_AT);  in gen_imm_insn()
532 				emit_instr(ctx, addu, dst, dst, MIPS_R_AT);  in gen_imm_insn()
535 				emit_instr(ctx, subu, dst, dst, MIPS_R_AT);  in gen_imm_insn()
594 	emit_instr(ctx, sltu, MIPS_R_AT, MIPS_R_T5, MIPS_R_A2);  in emit_bpf_tail_call()
596 	emit_instr(ctx, bne, MIPS_R_AT, MIPS_R_ZERO, b_off);  in emit_bpf_tail_call()
615 	emit_instr(ctx, ld, MIPS_R_AT, off, MIPS_R_T8);  in emit_bpf_tail_call()
617 	emit_instr(ctx, beq, MIPS_R_AT, MIPS_R_ZERO, b_off);  in emit_bpf_tail_call()
623 	emit_instr(ctx, ld, MIPS_R_T9, off, MIPS_R_AT);  in emit_bpf_tail_call()
678 		gen_imm_to_reg(insn, MIPS_R_AT, ctx);  in build_one_insn()
679 		emit_instr(ctx, dmultu, MIPS_R_AT, dst);  in build_one_insn()
701 		gen_imm_to_reg(insn, MIPS_R_AT, ctx);  in build_one_insn()
702 		emit_instr(ctx, multu, dst, MIPS_R_AT);  in build_one_insn()
733 		gen_imm_to_reg(insn, MIPS_R_AT, ctx);  in build_one_insn()
734 		emit_instr(ctx, divu, dst, MIPS_R_AT);  in build_one_insn()
755 		gen_imm_to_reg(insn, MIPS_R_AT, ctx);  in build_one_insn()
756 		emit_instr(ctx, ddivu, dst, MIPS_R_AT);  in build_one_insn()
786 				emit_instr(ctx, daddiu, MIPS_R_AT, MIPS_R_SP, MAX_BPF_STACK);  in build_one_insn()
787 				src = MIPS_R_AT;  in build_one_insn()
790 			int tmp_reg = MIPS_R_AT;  in build_one_insn()
798 			src = MIPS_R_AT;  in build_one_insn()
869 			int tmp_reg = MIPS_R_AT;  in build_one_insn()
877 			src = MIPS_R_AT;  in build_one_insn()
939 			gen_imm_to_reg(insn, MIPS_R_AT, ctx);  in build_one_insn()
940 			src = MIPS_R_AT;  in build_one_insn()
961 			emit_instr(ctx, sll, MIPS_R_AT, src, 0);  in build_one_insn()
962 			src = MIPS_R_AT;  in build_one_insn()
964 			emit_instr(ctx, sll, MIPS_R_AT, dst, 0);  in build_one_insn()
965 			dst = MIPS_R_AT;  in build_one_insn()
968 			emit_instr(ctx, and, MIPS_R_AT, dst, src);  in build_one_insn()
970 			dst = MIPS_R_AT;  in build_one_insn()
973 			emit_instr(ctx, dsubu, MIPS_R_AT, dst, src);  in build_one_insn()
979 					emit_instr(ctx, blez, MIPS_R_AT, b_off);  in build_one_insn()
981 					emit_instr(ctx, bgtz, MIPS_R_AT, b_off);  in build_one_insn()
989 				emit_instr(ctx, bgtz, MIPS_R_AT, b_off);  in build_one_insn()
991 				emit_instr(ctx, blez, MIPS_R_AT, b_off);  in build_one_insn()
995 			emit_instr(ctx, slt, MIPS_R_AT, dst, src);  in build_one_insn()
997 			dst = MIPS_R_AT;  in build_one_insn()
1002 			emit_instr(ctx, sltu, MIPS_R_AT, dst, src);  in build_one_insn()
1006 			emit_instr(ctx, or, MIPS_R_AT, MIPS_R_T9, MIPS_R_AT);  in build_one_insn()
1008 			dst = MIPS_R_AT;  in build_one_insn()
1011 			emit_instr(ctx, sltu, MIPS_R_AT, dst, src);  in build_one_insn()
1013 			dst = MIPS_R_AT;  in build_one_insn()
1137 			emit_instr(ctx, slti, MIPS_R_AT, dst, (int)t64s);  in build_one_insn()
1138 			src = MIPS_R_AT;  in build_one_insn()
1142 		emit_const_to_reg(ctx, MIPS_R_AT, (u64)t64s);  in build_one_insn()
1143 		emit_instr(ctx, slt, MIPS_R_AT, dst, MIPS_R_AT);  in build_one_insn()
1144 		src = MIPS_R_AT;  in build_one_insn()
1169 		emit_const_to_reg(ctx, MIPS_R_AT, (u64)t64s);  in build_one_insn()
1170 		emit_instr(ctx, sltu, MIPS_R_AT, dst, MIPS_R_AT);  in build_one_insn()
1171 		src = MIPS_R_AT;  in build_one_insn()
1197 		emit_const_to_reg(ctx, MIPS_R_AT, t64);  in build_one_insn()
1198 		emit_instr(ctx, and, MIPS_R_AT, dst, MIPS_R_AT);  in build_one_insn()
1199 		src = MIPS_R_AT;  in build_one_insn()
1295 		gen_imm_to_reg(insn, MIPS_R_AT, ctx);  in build_one_insn()
1298 			emit_instr(ctx, sb, MIPS_R_AT, mem_off, dst);  in build_one_insn()
1301 			emit_instr(ctx, sh, MIPS_R_AT, mem_off, dst);  in build_one_insn()
1304 			emit_instr(ctx, sw, MIPS_R_AT, mem_off, dst);  in build_one_insn()
1307 			emit_instr(ctx, sd, MIPS_R_AT, mem_off, dst);  in build_one_insn()
1368 					emit_instr(ctx, sll, MIPS_R_AT, src, 0);  in build_one_insn()
1369 					src = MIPS_R_AT;  in build_one_insn()
1383 					emit_instr(ctx, daddu, MIPS_R_AT, src, MIPS_R_ZERO);  in build_one_insn()
1384 					emit_instr(ctx, dinsu, MIPS_R_AT, MIPS_R_ZERO, 32, 32);  in build_one_insn()
1385 					src = MIPS_R_AT;  in build_one_insn()
1407 					emit_instr(ctx, daddu, MIPS_R_AT, src, MIPS_R_ZERO);  in build_one_insn()
1408 					emit_instr(ctx, dinsu, MIPS_R_AT, MIPS_R_ZERO, 32, 32);  in build_one_insn()
1409 					src = MIPS_R_AT;  in build_one_insn()