Lines Matching refs:xcp
794 static inline int cop1_64bit(struct pt_regs *xcp) in cop1_64bit() argument
812 if (cop1_64bit(xcp) && !hybrid_fprs()) \
820 if (cop1_64bit(xcp) && !hybrid_fprs()) { \
841 ((di) = get_fpr64(&ctx->fpr[(x) & ~(cop1_64bit(xcp) ^ 1)], 0))
846 fpr = (x) & ~(cop1_64bit(xcp) ^ 1); \
860 static inline void cop1_cfc(struct pt_regs *xcp, struct mips_fpu_struct *ctx, in cop1_cfc() argument
870 (void *)xcp->cp0_epc, MIPSInst_RT(ir), value); in cop1_cfc()
880 (void *)xcp->cp0_epc, MIPSInst_RT(ir), value); in cop1_cfc()
888 (void *)xcp->cp0_epc, MIPSInst_RT(ir), value); in cop1_cfc()
899 (void *)xcp->cp0_epc, MIPSInst_RT(ir), value); in cop1_cfc()
911 xcp->regs[MIPSInst_RT(ir)] = value; in cop1_cfc()
917 static inline void cop1_ctc(struct pt_regs *xcp, struct mips_fpu_struct *ctx, in cop1_ctc() argument
927 value = xcp->regs[MIPSInst_RT(ir)]; in cop1_ctc()
932 (void *)xcp->cp0_epc, MIPSInst_RT(ir), value); in cop1_ctc()
943 (void *)xcp->cp0_epc, MIPSInst_RT(ir), value); in cop1_ctc()
954 (void *)xcp->cp0_epc, MIPSInst_RT(ir), value); in cop1_ctc()
963 (void *)xcp->cp0_epc, MIPSInst_RT(ir), value); in cop1_ctc()
983 static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx, in cop1Emulate() argument
986 unsigned long contpc = xcp->cp0_epc + dec_insn.pc_inc; in cop1Emulate()
1005 if (delay_slot(xcp)) { in cop1Emulate()
1007 if (!mm_isBranchInstr(xcp, dec_insn, &contpc)) in cop1Emulate()
1008 clear_delay_slot(xcp); in cop1Emulate()
1010 if (!isBranchInstr(xcp, dec_insn, &contpc)) in cop1Emulate()
1011 clear_delay_slot(xcp); in cop1Emulate()
1015 if (delay_slot(xcp)) { in cop1Emulate()
1058 perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, xcp, 0); in cop1Emulate()
1062 dva = (u64 __user *) (xcp->regs[MIPSInst_RS(ir)] + in cop1Emulate()
1080 dva = (u64 __user *) (xcp->regs[MIPSInst_RS(ir)] + in cop1Emulate()
1097 wva = (u32 __user *) (xcp->regs[MIPSInst_RS(ir)] + in cop1Emulate()
1114 wva = (u32 __user *) (xcp->regs[MIPSInst_RS(ir)] + in cop1Emulate()
1138 DIFROMREG(xcp->regs[MIPSInst_RT(ir)], in cop1Emulate()
1148 DITOREG(xcp->regs[MIPSInst_RT(ir)], MIPSInst_RD(ir)); in cop1Emulate()
1157 SIFROMHREG(xcp->regs[MIPSInst_RT(ir)], in cop1Emulate()
1167 SITOHREG(xcp->regs[MIPSInst_RT(ir)], MIPSInst_RD(ir)); in cop1Emulate()
1173 SIFROMREG(xcp->regs[MIPSInst_RT(ir)], in cop1Emulate()
1180 SITOREG(xcp->regs[MIPSInst_RT(ir)], MIPSInst_RD(ir)); in cop1Emulate()
1185 cop1_cfc(xcp, ctx, ir); in cop1Emulate()
1190 cop1_ctc(xcp, ctx, ir); in cop1Emulate()
1198 if (!cpu_has_mips_r6 || delay_slot(xcp)) in cop1Emulate()
1218 if (delay_slot(xcp)) in cop1Emulate()
1245 set_delay_slot(xcp); in cop1Emulate()
1257 bcpc = xcp->cp0_epc; in cop1Emulate()
1258 xcp->cp0_epc += dec_insn.pc_inc; in cop1Emulate()
1263 contpc = (xcp->cp0_epc + (contpc << 1)); in cop1Emulate()
1283 sig = mips_dsemul(xcp, ir, in cop1Emulate()
1288 xcp->cp0_epc = bcpc; in cop1Emulate()
1296 contpc = (xcp->cp0_epc + (contpc << 2)); in cop1Emulate()
1331 xcp->cp0_epc = bcpc; in cop1Emulate()
1339 sig = mips_dsemul(xcp, ir, bcpc, contpc); in cop1Emulate()
1343 xcp->cp0_epc = bcpc; in cop1Emulate()
1351 xcp->cp0_epc += dec_insn.pc_inc; in cop1Emulate()
1365 sig = fpu_emu(xcp, ctx, ir); in cop1Emulate()
1375 sig = fpux_emu(xcp, ctx, ir, fault_addr); in cop1Emulate()
1388 xcp->regs[MIPSInst_RD(ir)] = in cop1Emulate()
1389 xcp->regs[MIPSInst_RS(ir)]; in cop1Emulate()
1396 xcp->cp0_epc = contpc; in cop1Emulate()
1397 clear_delay_slot(xcp); in cop1Emulate()
1475 static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx, in fpux_emu() argument
1492 va = (void __user *) (xcp->regs[MIPSInst_FR(ir)] + in fpux_emu()
1493 xcp->regs[MIPSInst_FT(ir)]); in fpux_emu()
1510 va = (void __user *) (xcp->regs[MIPSInst_FR(ir)] + in fpux_emu()
1511 xcp->regs[MIPSInst_FT(ir)]); in fpux_emu()
1589 va = (void __user *) (xcp->regs[MIPSInst_FR(ir)] + in fpux_emu()
1590 xcp->regs[MIPSInst_FT(ir)]); in fpux_emu()
1607 va = (void __user *) (xcp->regs[MIPSInst_FR(ir)] + in fpux_emu()
1608 xcp->regs[MIPSInst_FT(ir)]); in fpux_emu()
1670 static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx, in fpu_emu() argument
1759 if (xcp->regs[MIPSInst_FT(ir)] != 0) in fpu_emu()
1768 if (xcp->regs[MIPSInst_FT(ir)] == 0) in fpu_emu()
2131 if (xcp->regs[MIPSInst_FT(ir)] != 0) in fpu_emu()
2139 if (xcp->regs[MIPSInst_FT(ir)] == 0) in fpu_emu()
2825 int fpu_emulator_cop1Handler(struct pt_regs *xcp, struct mips_fpu_struct *ctx, in fpu_emulator_cop1Handler() argument
2834 oldepc = xcp->cp0_epc; in fpu_emulator_cop1Handler()
2836 prevepc = xcp->cp0_epc; in fpu_emulator_cop1Handler()
2843 if ((get_user(instr[0], (u16 __user *)msk_isa16_mode(xcp->cp0_epc))) || in fpu_emulator_cop1Handler()
2844 (get_user(instr[1], (u16 __user *)msk_isa16_mode(xcp->cp0_epc + 2))) || in fpu_emulator_cop1Handler()
2845 (get_user(instr[2], (u16 __user *)msk_isa16_mode(xcp->cp0_epc + 4))) || in fpu_emulator_cop1Handler()
2846 (get_user(instr[3], (u16 __user *)msk_isa16_mode(xcp->cp0_epc + 6)))) { in fpu_emulator_cop1Handler()
2883 (mips_instruction __user *) xcp->cp0_epc)) || in fpu_emulator_cop1Handler()
2885 (mips_instruction __user *)(xcp->cp0_epc+4)))) { in fpu_emulator_cop1Handler()
2897 xcp->cp0_epc += dec_insn.pc_inc; /* Skip NOPs */ in fpu_emulator_cop1Handler()
2903 sig = cop1Emulate(xcp, ctx, dec_insn, fault_addr); in fpu_emulator_cop1Handler()
2917 if ((xcp->cp0_epc ^ prevepc) & 0x1) in fpu_emulator_cop1Handler()
2921 } while (xcp->cp0_epc > prevepc); in fpu_emulator_cop1Handler()
2924 if (sig == SIGILL && xcp->cp0_epc != oldepc) in fpu_emulator_cop1Handler()