151 static void kvm_mips_build_save_scratch(u32 **p, unsigned int tmp,  in kvm_mips_build_save_scratch()  argument
155 	UASM_i_MFC0(p, tmp, scratch_vcpu[0], scratch_vcpu[1]);  in kvm_mips_build_save_scratch()
156 	UASM_i_SW(p, tmp, offsetof(struct pt_regs, cp0_epc), frame);  in kvm_mips_build_save_scratch()
160 		UASM_i_MFC0(p, tmp, scratch_tmp[0], scratch_tmp[1]);  in kvm_mips_build_save_scratch()
161 		UASM_i_SW(p, tmp, offsetof(struct pt_regs, cp0_cause), frame);  in kvm_mips_build_save_scratch()
165 static void kvm_mips_build_restore_scratch(u32 **p, unsigned int tmp,  in kvm_mips_build_restore_scratch()  argument
172 	UASM_i_LW(p, tmp, offsetof(struct pt_regs, cp0_epc), frame);  in kvm_mips_build_restore_scratch()
173 	UASM_i_MTC0(p, tmp, scratch_vcpu[0], scratch_vcpu[1]);  in kvm_mips_build_restore_scratch()
176 		UASM_i_LW(p, tmp, offsetof(struct pt_regs, cp0_cause), frame);  in kvm_mips_build_restore_scratch()
177 		UASM_i_MTC0(p, tmp, scratch_tmp[0], scratch_tmp[1]);  in kvm_mips_build_restore_scratch()
189 static inline void build_set_exc_base(u32 **p, unsigned int reg)  in build_set_exc_base()  argument
193 		uasm_i_ori(p, reg, reg, MIPS_EBASE_WG);  in build_set_exc_base()
194 		UASM_i_MTC0(p, reg, C0_EBASE);  in build_set_exc_base()
196 		uasm_i_mtc0(p, reg, C0_EBASE);  in build_set_exc_base()
216 	u32 *p = addr;  in kvm_mips_build_vcpu_run()  local
225 	UASM_i_ADDIU(&p, K1, SP, -(int)sizeof(struct pt_regs));  in kvm_mips_build_vcpu_run()
229 		UASM_i_SW(&p, i, offsetof(struct pt_regs, regs[i]), K1);  in kvm_mips_build_vcpu_run()
233 	uasm_i_mfc0(&p, V0, C0_STATUS);  in kvm_mips_build_vcpu_run()
234 	UASM_i_SW(&p, V0, offsetof(struct pt_regs, cp0_status), K1);  in kvm_mips_build_vcpu_run()
237 	kvm_mips_build_save_scratch(&p, V1, K1);  in kvm_mips_build_vcpu_run()
240 	UASM_i_MTC0(&p, A1, scratch_vcpu[0], scratch_vcpu[1]);  in kvm_mips_build_vcpu_run()
243 	UASM_i_ADDIU(&p, K1, A1, offsetof(struct kvm_vcpu, arch));  in kvm_mips_build_vcpu_run()
249 	UASM_i_SW(&p, SP, offsetof(struct kvm_vcpu_arch, host_stack), K1);  in kvm_mips_build_vcpu_run()
252 	UASM_i_SW(&p, GP, offsetof(struct kvm_vcpu_arch, host_gp), K1);  in kvm_mips_build_vcpu_run()
258 	UASM_i_LA(&p, K0, ST0_EXL | KSU_USER | ST0_BEV | ST0_KX_IF_64);  in kvm_mips_build_vcpu_run()
259 	uasm_i_mtc0(&p, K0, C0_STATUS);  in kvm_mips_build_vcpu_run()
260 	uasm_i_ehb(&p);  in kvm_mips_build_vcpu_run()
263 	UASM_i_LW(&p, K0, offsetof(struct kvm_vcpu_arch, guest_ebase), K1);  in kvm_mips_build_vcpu_run()
264 	build_set_exc_base(&p, K0);  in kvm_mips_build_vcpu_run()
271 	uasm_i_addiu(&p, K0, ZERO, ST0_EXL | KSU_USER | ST0_IE | ST0_KX_IF_64);  in kvm_mips_build_vcpu_run()
272 	uasm_i_andi(&p, V0, V0, ST0_IM);  in kvm_mips_build_vcpu_run()
273 	uasm_i_or(&p, K0, K0, V0);  in kvm_mips_build_vcpu_run()
274 	uasm_i_mtc0(&p, K0, C0_STATUS);  in kvm_mips_build_vcpu_run()
275 	uasm_i_ehb(&p);  in kvm_mips_build_vcpu_run()
277 	p = kvm_mips_build_enter_guest(p);  in kvm_mips_build_vcpu_run()
279 	return p;  in kvm_mips_build_vcpu_run()
294 	u32 *p = addr;  in kvm_mips_build_enter_guest()  local
305 	UASM_i_LW(&p, T0, offsetof(struct kvm_vcpu_arch, pc), K1);  in kvm_mips_build_enter_guest()
306 	UASM_i_MTC0(&p, T0, C0_EPC);  in kvm_mips_build_enter_guest()
310 	UASM_i_MFC0(&p, K0, c0_kscratch(), pgd_reg);  in kvm_mips_build_enter_guest()
311 	UASM_i_SW(&p, K0, offsetof(struct kvm_vcpu_arch, host_pgd), K1);  in kvm_mips_build_enter_guest()
321 	UASM_i_LW(&p, S0, (int)offsetof(struct kvm_vcpu, kvm) -  in kvm_mips_build_enter_guest()
323 	UASM_i_LW(&p, A0, offsetof(struct kvm, arch.gpa_mm.pgd), S0);  in kvm_mips_build_enter_guest()
324 	UASM_i_LA(&p, T9, (unsigned long)tlbmiss_handler_setup_pgd);  in kvm_mips_build_enter_guest()
325 	uasm_i_jalr(&p, RA, T9);  in kvm_mips_build_enter_guest()
328 		UASM_i_MTC0(&p, A0, C0_PWBASE);  in kvm_mips_build_enter_guest()
330 		uasm_i_nop(&p);  in kvm_mips_build_enter_guest()
333 	uasm_i_addiu(&p, V1, ZERO, 1);  in kvm_mips_build_enter_guest()
334 	uasm_i_mfc0(&p, K0, C0_GUESTCTL0);  in kvm_mips_build_enter_guest()
335 	uasm_i_ins(&p, K0, V1, MIPS_GCTL0_GM_SHIFT, 1);  in kvm_mips_build_enter_guest()
336 	uasm_i_mtc0(&p, K0, C0_GUESTCTL0);  in kvm_mips_build_enter_guest()
345 		uasm_i_mfc0(&p, T0, C0_GUESTCTL1);  in kvm_mips_build_enter_guest()
347 		uasm_i_ext(&p, T1, T0, MIPS_GCTL1_ID_SHIFT,  in kvm_mips_build_enter_guest()
349 		uasm_i_ins(&p, T0, T1, MIPS_GCTL1_RID_SHIFT,  in kvm_mips_build_enter_guest()
351 		uasm_i_mtc0(&p, T0, C0_GUESTCTL1);  in kvm_mips_build_enter_guest()
360 	UASM_i_MFC0(&p, K0, C0_ENTRYHI);  in kvm_mips_build_enter_guest()
361 	UASM_i_SW(&p, K0, offsetof(struct kvm_vcpu_arch, host_entryhi),  in kvm_mips_build_enter_guest()
365 	UASM_i_ADDIU(&p, T1, S0,  in kvm_mips_build_enter_guest()
369 	UASM_i_LW(&p, T0, offsetof(struct kvm_vcpu_arch, cop0), K1);  in kvm_mips_build_enter_guest()
370 	UASM_i_LW(&p, T0, offsetof(struct mips_coproc, reg[MIPS_CP0_STATUS][0]),  in kvm_mips_build_enter_guest()
372 	uasm_i_andi(&p, T0, T0, KSU_USER | ST0_ERL | ST0_EXL);  in kvm_mips_build_enter_guest()
373 	uasm_i_xori(&p, T0, T0, KSU_USER);  in kvm_mips_build_enter_guest()
374 	uasm_il_bnez(&p, &r, T0, label_kernel_asid);  in kvm_mips_build_enter_guest()
375 	 UASM_i_ADDIU(&p, T1, K1, offsetof(struct kvm_vcpu_arch,  in kvm_mips_build_enter_guest()
378 	UASM_i_ADDIU(&p, T1, K1, offsetof(struct kvm_vcpu_arch,  in kvm_mips_build_enter_guest()
380 	uasm_l_kernel_asid(&l, p);  in kvm_mips_build_enter_guest()
385 	uasm_i_lw(&p, T2, offsetof(struct thread_info, cpu), GP);  in kvm_mips_build_enter_guest()
387 	uasm_i_sll(&p, T2, T2, ilog2(sizeof(long)));  in kvm_mips_build_enter_guest()
388 	UASM_i_ADDU(&p, T3, T1, T2);  in kvm_mips_build_enter_guest()
389 	UASM_i_LW(&p, K0, 0, T3);  in kvm_mips_build_enter_guest()
395 	uasm_i_addiu(&p, T3, ZERO, sizeof(struct cpuinfo_mips)/sizeof(long));  in kvm_mips_build_enter_guest()
396 	uasm_i_mul(&p, T2, T2, T3);  in kvm_mips_build_enter_guest()
398 	UASM_i_LA_mostly(&p, AT, (long)&cpu_data[0].asid_mask);  in kvm_mips_build_enter_guest()
399 	UASM_i_ADDU(&p, AT, AT, T2);  in kvm_mips_build_enter_guest()
400 	UASM_i_LW(&p, T2, uasm_rel_lo((long)&cpu_data[0].asid_mask), AT);  in kvm_mips_build_enter_guest()
401 	uasm_i_and(&p, K0, K0, T2);  in kvm_mips_build_enter_guest()
403 	uasm_i_andi(&p, K0, K0, MIPS_ENTRYHI_ASID);  in kvm_mips_build_enter_guest()
413 	UASM_i_LW(&p, A0, (int)offsetof(struct mm_struct, pgd) -  in kvm_mips_build_enter_guest()
416 	UASM_i_LA(&p, T9, (unsigned long)tlbmiss_handler_setup_pgd);  in kvm_mips_build_enter_guest()
417 	uasm_i_jalr(&p, RA, T9);  in kvm_mips_build_enter_guest()
418 	 uasm_i_mtc0(&p, K0, C0_ENTRYHI);  in kvm_mips_build_enter_guest()
421 	uasm_i_mtc0(&p, K0, C0_ENTRYHI);  in kvm_mips_build_enter_guest()
424 	uasm_i_ehb(&p);  in kvm_mips_build_enter_guest()
427 	uasm_i_mtc0(&p, ZERO, C0_HWRENA);  in kvm_mips_build_enter_guest()
434 		UASM_i_LW(&p, i, offsetof(struct kvm_vcpu_arch, gprs[i]), K1);  in kvm_mips_build_enter_guest()
439 	UASM_i_LW(&p, K0, offsetof(struct kvm_vcpu_arch, hi), K1);  in kvm_mips_build_enter_guest()
440 	uasm_i_mthi(&p, K0);  in kvm_mips_build_enter_guest()
442 	UASM_i_LW(&p, K0, offsetof(struct kvm_vcpu_arch, lo), K1);  in kvm_mips_build_enter_guest()
443 	uasm_i_mtlo(&p, K0);  in kvm_mips_build_enter_guest()
447 	UASM_i_LW(&p, K0, offsetof(struct kvm_vcpu_arch, gprs[K0]), K1);  in kvm_mips_build_enter_guest()
448 	UASM_i_LW(&p, K1, offsetof(struct kvm_vcpu_arch, gprs[K1]), K1);  in kvm_mips_build_enter_guest()
451 	uasm_i_eret(&p);  in kvm_mips_build_enter_guest()
455 	return p;  in kvm_mips_build_enter_guest()
469 	u32 *p = addr;  in kvm_mips_build_tlb_refill_exception()  local
479 	UASM_i_MTC0(&p, K1, scratch_tmp[0], scratch_tmp[1]);  in kvm_mips_build_tlb_refill_exception()
482 	UASM_i_MFC0(&p, K1, scratch_vcpu[0], scratch_vcpu[1]);  in kvm_mips_build_tlb_refill_exception()
485 	UASM_i_SW(&p, K0, offsetof(struct kvm_vcpu, arch.gprs[K0]), K1);  in kvm_mips_build_tlb_refill_exception()
505 	build_get_pmde64(&p, &l, &r, K0, K1); /* get pmd in K1 */  in kvm_mips_build_tlb_refill_exception()
507 	build_get_pgde32(&p, K0, K1); /* get pgd in K1 */  in kvm_mips_build_tlb_refill_exception()
512 	build_get_ptep(&p, K0, K1);  in kvm_mips_build_tlb_refill_exception()
513 	build_update_entries(&p, K0, K1);  in kvm_mips_build_tlb_refill_exception()
514 	build_tlb_write_entry(&p, &l, &r, tlb_random);  in kvm_mips_build_tlb_refill_exception()
519 	UASM_i_MFC0(&p, K1, scratch_vcpu[0], scratch_vcpu[1]);  in kvm_mips_build_tlb_refill_exception()
522 	UASM_i_LW(&p, K0, offsetof(struct kvm_vcpu, arch.gprs[K0]), K1);  in kvm_mips_build_tlb_refill_exception()
523 	uasm_i_ehb(&p);  in kvm_mips_build_tlb_refill_exception()
524 	UASM_i_MFC0(&p, K1, scratch_tmp[0], scratch_tmp[1]);  in kvm_mips_build_tlb_refill_exception()
527 	uasm_i_eret(&p);  in kvm_mips_build_tlb_refill_exception()
529 	return p;  in kvm_mips_build_tlb_refill_exception()
544 	u32 *p = addr;  in kvm_mips_build_exception()  local
554 	UASM_i_MTC0(&p, K1, scratch_tmp[0], scratch_tmp[1]);  in kvm_mips_build_exception()
557 	UASM_i_MFC0(&p, K1, scratch_vcpu[0], scratch_vcpu[1]);  in kvm_mips_build_exception()
558 	UASM_i_ADDIU(&p, K1, K1, offsetof(struct kvm_vcpu, arch));  in kvm_mips_build_exception()
561 	UASM_i_SW(&p, K0, offsetof(struct kvm_vcpu_arch, gprs[K0]), K1);  in kvm_mips_build_exception()
564 	uasm_il_b(&p, &r, label_exit_common);  in kvm_mips_build_exception()
565 	 uasm_i_nop(&p);  in kvm_mips_build_exception()
570 	return p;  in kvm_mips_build_exception()
586 	u32 *p = addr;  in kvm_mips_build_exit()  local
611 		UASM_i_SW(&p, i, offsetof(struct kvm_vcpu_arch, gprs[i]), K1);  in kvm_mips_build_exit()
616 	uasm_i_mfhi(&p, T0);  in kvm_mips_build_exit()
617 	UASM_i_SW(&p, T0, offsetof(struct kvm_vcpu_arch, hi), K1);  in kvm_mips_build_exit()
619 	uasm_i_mflo(&p, T0);  in kvm_mips_build_exit()
620 	UASM_i_SW(&p, T0, offsetof(struct kvm_vcpu_arch, lo), K1);  in kvm_mips_build_exit()
624 	uasm_i_ehb(&p);  in kvm_mips_build_exit()
625 	UASM_i_MFC0(&p, T0, scratch_tmp[0], scratch_tmp[1]);  in kvm_mips_build_exit()
626 	UASM_i_SW(&p, T0, offsetof(struct kvm_vcpu_arch, gprs[K1]), K1);  in kvm_mips_build_exit()
631 	UASM_i_MFC0(&p, S1, scratch_vcpu[0], scratch_vcpu[1]);  in kvm_mips_build_exit()
634 	UASM_i_LW(&p, S0, offsetof(struct kvm_vcpu, run), S1);  in kvm_mips_build_exit()
640 	UASM_i_MFC0(&p, K0, C0_EPC);  in kvm_mips_build_exit()
641 	UASM_i_SW(&p, K0, offsetof(struct kvm_vcpu_arch, pc), K1);  in kvm_mips_build_exit()
643 	UASM_i_MFC0(&p, K0, C0_BADVADDR);  in kvm_mips_build_exit()
644 	UASM_i_SW(&p, K0, offsetof(struct kvm_vcpu_arch, host_cp0_badvaddr),  in kvm_mips_build_exit()
647 	uasm_i_mfc0(&p, K0, C0_CAUSE);  in kvm_mips_build_exit()
648 	uasm_i_sw(&p, K0, offsetof(struct kvm_vcpu_arch, host_cp0_cause), K1);  in kvm_mips_build_exit()
651 		uasm_i_mfc0(&p, K0, C0_BADINSTR);  in kvm_mips_build_exit()
652 		uasm_i_sw(&p, K0, offsetof(struct kvm_vcpu_arch,  in kvm_mips_build_exit()
657 		uasm_i_mfc0(&p, K0, C0_BADINSTRP);  in kvm_mips_build_exit()
658 		uasm_i_sw(&p, K0, offsetof(struct kvm_vcpu_arch,  in kvm_mips_build_exit()
666 	uasm_i_mfc0(&p, V0, C0_STATUS);  in kvm_mips_build_exit()
668 	uasm_i_lui(&p, AT, ST0_BEV >> 16);  in kvm_mips_build_exit()
669 	uasm_i_or(&p, K0, V0, AT);  in kvm_mips_build_exit()
671 	uasm_i_mtc0(&p, K0, C0_STATUS);  in kvm_mips_build_exit()
672 	uasm_i_ehb(&p);  in kvm_mips_build_exit()
674 	UASM_i_LA_mostly(&p, K0, (long)&ebase);  in kvm_mips_build_exit()
675 	UASM_i_LW(&p, K0, uasm_rel_lo((long)&ebase), K0);  in kvm_mips_build_exit()
676 	build_set_exc_base(&p, K0);  in kvm_mips_build_exit()
683 		uasm_i_lui(&p, AT, ST0_CU1 >> 16);  in kvm_mips_build_exit()
684 		uasm_i_and(&p, V1, V0, AT);  in kvm_mips_build_exit()
685 		uasm_il_beqz(&p, &r, V1, label_fpu_1);  in kvm_mips_build_exit()
686 		 uasm_i_nop(&p);  in kvm_mips_build_exit()
687 		uasm_i_cfc1(&p, T0, 31);  in kvm_mips_build_exit()
688 		uasm_i_sw(&p, T0, offsetof(struct kvm_vcpu_arch, fpu.fcr31),  in kvm_mips_build_exit()
690 		uasm_i_ctc1(&p, ZERO, 31);  in kvm_mips_build_exit()
691 		uasm_l_fpu_1(&l, p);  in kvm_mips_build_exit()
699 		uasm_i_mfc0(&p, T0, C0_CONFIG5);  in kvm_mips_build_exit()
700 		uasm_i_ext(&p, T0, T0, 27, 1); /* MIPS_CONF5_MSAEN */  in kvm_mips_build_exit()
701 		uasm_il_beqz(&p, &r, T0, label_msa_1);  in kvm_mips_build_exit()
702 		 uasm_i_nop(&p);  in kvm_mips_build_exit()
703 		uasm_i_cfcmsa(&p, T0, MSA_CSR);  in kvm_mips_build_exit()
704 		uasm_i_sw(&p, T0, offsetof(struct kvm_vcpu_arch, fpu.msacsr),  in kvm_mips_build_exit()
706 		uasm_i_ctcmsa(&p, MSA_CSR, ZERO);  in kvm_mips_build_exit()
707 		uasm_l_msa_1(&l, p);  in kvm_mips_build_exit()
713 		UASM_i_LW(&p, K0, offsetof(struct kvm_vcpu_arch, host_entryhi),  in kvm_mips_build_exit()
715 		UASM_i_MTC0(&p, K0, C0_ENTRYHI);  in kvm_mips_build_exit()
724 	UASM_i_LW(&p, A0,  in kvm_mips_build_exit()
726 	UASM_i_LA(&p, T9, (unsigned long)tlbmiss_handler_setup_pgd);  in kvm_mips_build_exit()
727 	uasm_i_jalr(&p, RA, T9);  in kvm_mips_build_exit()
730 		UASM_i_MTC0(&p, A0, C0_PWBASE);  in kvm_mips_build_exit()
732 		uasm_i_nop(&p);  in kvm_mips_build_exit()
735 	uasm_i_mfc0(&p, K0, C0_GUESTCTL0);  in kvm_mips_build_exit()
736 	uasm_i_ins(&p, K0, ZERO, MIPS_GCTL0_GM_SHIFT, 1);  in kvm_mips_build_exit()
737 	uasm_i_mtc0(&p, K0, C0_GUESTCTL0);  in kvm_mips_build_exit()
740 	uasm_i_sw(&p, K0,  in kvm_mips_build_exit()
748 		uasm_i_mfc0(&p, T0, C0_GUESTCTL1);  in kvm_mips_build_exit()
750 		uasm_i_ins(&p, T0, ZERO, MIPS_GCTL1_RID_SHIFT,  in kvm_mips_build_exit()
752 		uasm_i_mtc0(&p, T0, C0_GUESTCTL1);  in kvm_mips_build_exit()
757 	uasm_i_addiu(&p, AT, ZERO, ~(ST0_EXL | KSU_USER | ST0_IE));  in kvm_mips_build_exit()
758 	uasm_i_and(&p, V0, V0, AT);  in kvm_mips_build_exit()
759 	uasm_i_lui(&p, AT, ST0_CU0 >> 16);  in kvm_mips_build_exit()
760 	uasm_i_or(&p, V0, V0, AT);  in kvm_mips_build_exit()
762 	uasm_i_ori(&p, V0, V0, ST0_SX | ST0_UX);  in kvm_mips_build_exit()
764 	uasm_i_mtc0(&p, V0, C0_STATUS);  in kvm_mips_build_exit()
765 	uasm_i_ehb(&p);  in kvm_mips_build_exit()
768 	UASM_i_LW(&p, GP, offsetof(struct kvm_vcpu_arch, host_gp), K1);  in kvm_mips_build_exit()
771 	UASM_i_LW(&p, SP, offsetof(struct kvm_vcpu_arch, host_stack), K1);  in kvm_mips_build_exit()
774 	UASM_i_ADDIU(&p, SP, SP, -(int)sizeof(struct pt_regs));  in kvm_mips_build_exit()
782 	kvm_mips_build_restore_scratch(&p, K0, SP);  in kvm_mips_build_exit()
785 	UASM_i_LA_mostly(&p, K0, (long)&hwrena);  in kvm_mips_build_exit()
786 	uasm_i_lw(&p, K0, uasm_rel_lo((long)&hwrena), K0);  in kvm_mips_build_exit()
787 	uasm_i_mtc0(&p, K0, C0_HWRENA);  in kvm_mips_build_exit()
795 	uasm_i_move(&p, A0, S0);  in kvm_mips_build_exit()
796 	uasm_i_move(&p, A1, S1);  in kvm_mips_build_exit()
797 	UASM_i_LA(&p, T9, (unsigned long)kvm_mips_handle_exit);  in kvm_mips_build_exit()
798 	uasm_i_jalr(&p, RA, T9);  in kvm_mips_build_exit()
799 	 UASM_i_ADDIU(&p, SP, SP, -CALLFRAME_SIZ);  in kvm_mips_build_exit()
803 	p = kvm_mips_build_ret_from_exit(p);  in kvm_mips_build_exit()
805 	return p;  in kvm_mips_build_exit()
819 	u32 *p = addr;  in kvm_mips_build_ret_from_exit()  local
829 	uasm_i_di(&p, ZERO);  in kvm_mips_build_ret_from_exit()
830 	uasm_i_ehb(&p);  in kvm_mips_build_ret_from_exit()
838 	uasm_i_move(&p, K1, S1);  in kvm_mips_build_ret_from_exit()
839 	UASM_i_ADDIU(&p, K1, K1, offsetof(struct kvm_vcpu, arch));  in kvm_mips_build_ret_from_exit()
845 	uasm_i_andi(&p, T0, V0, RESUME_HOST);  in kvm_mips_build_ret_from_exit()
846 	uasm_il_bnez(&p, &r, T0, label_return_to_host);  in kvm_mips_build_ret_from_exit()
847 	 uasm_i_nop(&p);  in kvm_mips_build_ret_from_exit()
849 	p = kvm_mips_build_ret_to_guest(p);  in kvm_mips_build_ret_from_exit()
851 	uasm_l_return_to_host(&l, p);  in kvm_mips_build_ret_from_exit()
852 	p = kvm_mips_build_ret_to_host(p);  in kvm_mips_build_ret_from_exit()
856 	return p;  in kvm_mips_build_ret_from_exit()
870 	u32 *p = addr;  in kvm_mips_build_ret_to_guest()  local
873 	UASM_i_MTC0(&p, S1, scratch_vcpu[0], scratch_vcpu[1]);  in kvm_mips_build_ret_to_guest()
876 	UASM_i_LW(&p, T0, offsetof(struct kvm_vcpu_arch, guest_ebase), K1);  in kvm_mips_build_ret_to_guest()
879 	uasm_i_mfc0(&p, V1, C0_STATUS);  in kvm_mips_build_ret_to_guest()
880 	uasm_i_lui(&p, AT, ST0_BEV >> 16);  in kvm_mips_build_ret_to_guest()
881 	uasm_i_or(&p, K0, V1, AT);  in kvm_mips_build_ret_to_guest()
882 	uasm_i_mtc0(&p, K0, C0_STATUS);  in kvm_mips_build_ret_to_guest()
883 	uasm_i_ehb(&p);  in kvm_mips_build_ret_to_guest()
884 	build_set_exc_base(&p, T0);  in kvm_mips_build_ret_to_guest()
887 	uasm_i_ori(&p, V1, V1, ST0_EXL | KSU_USER | ST0_IE);  in kvm_mips_build_ret_to_guest()
888 	UASM_i_LA(&p, AT, ~(ST0_CU0 | ST0_MX | ST0_SX | ST0_UX));  in kvm_mips_build_ret_to_guest()
889 	uasm_i_and(&p, V1, V1, AT);  in kvm_mips_build_ret_to_guest()
890 	uasm_i_mtc0(&p, V1, C0_STATUS);  in kvm_mips_build_ret_to_guest()
891 	uasm_i_ehb(&p);  in kvm_mips_build_ret_to_guest()
893 	p = kvm_mips_build_enter_guest(p);  in kvm_mips_build_ret_to_guest()
895 	return p;  in kvm_mips_build_ret_to_guest()
910 	u32 *p = addr;  in kvm_mips_build_ret_to_host()  local
914 	UASM_i_LW(&p, K1, offsetof(struct kvm_vcpu_arch, host_stack), K1);  in kvm_mips_build_ret_to_host()
915 	UASM_i_ADDIU(&p, K1, K1, -(int)sizeof(struct pt_regs));  in kvm_mips_build_ret_to_host()
921 	uasm_i_sra(&p, K0, V0, 2);  in kvm_mips_build_ret_to_host()
922 	uasm_i_move(&p, V0, K0);  in kvm_mips_build_ret_to_host()
928 		UASM_i_LW(&p, i, offsetof(struct pt_regs, regs[i]), K1);  in kvm_mips_build_ret_to_host()
932 	UASM_i_LA_mostly(&p, K0, (long)&hwrena);  in kvm_mips_build_ret_to_host()
933 	uasm_i_lw(&p, K0, uasm_rel_lo((long)&hwrena), K0);  in kvm_mips_build_ret_to_host()
934 	uasm_i_mtc0(&p, K0, C0_HWRENA);  in kvm_mips_build_ret_to_host()
937 	UASM_i_LW(&p, RA, offsetof(struct pt_regs, regs[RA]), K1);  in kvm_mips_build_ret_to_host()
938 	uasm_i_jr(&p, RA);  in kvm_mips_build_ret_to_host()
939 	 uasm_i_nop(&p);  in kvm_mips_build_ret_to_host()
941 	return p;  in kvm_mips_build_ret_to_host()