Lines Matching refs:t1
183 1: PTR_L t1, VPEBOOTCFG_PC(v1)
186 jr t1
246 PTR_LA t1, 1f
247 jr.hb t1
277 sll t1, ta1, VPECONF0_XTC_SHIFT
278 or t0, t0, t1
315 li t1, COREBOOTCFG_SIZE
316 mul t0, t0, t1
317 PTR_LA t1, mips_cps_core_bootcfg
318 PTR_L t1, 0(t1)
319 PTR_ADDU v0, t0, t1
337 mfc0 t1, CP0_MVPCONF0
338 srl t1, t1, MVPCONF0_PVPE_SHIFT
339 andi t1, t1, MVPCONF0_PVPE >> MVPCONF0_PVPE_SHIFT
340 addiu t1, t1, 1
343 clz t1, t1
345 subu t1, t2, t1
347 sll t1, t2, t1
348 addiu t1, t1, -1
352 and t9, t9, t1
356 li t1, VPEBOOTCFG_SIZE
357 mul v1, t9, t1
375 PTR_L t1, GCR_CPC_BASE_OFS(t3)
377 and t1, t1, t2
379 PTR_ADD t1, t1, t2
382 PTR_S ta2, CPC_CL_VC_RUN_OFS(t1)
386 PTR_S ta2, CPC_CL_VC_STOP_OFS(t1)
401 PTR_LA t1, 1f
402 jr.hb t1
404 1: mfc0 t1, CP0_MVPCONTROL
405 ori t1, t1, MVPCONTROL_VPC
406 mtc0 t1, CP0_MVPCONTROL
441 lw t1, VPEBOOTCFG_PC(t0)
442 mttc0 t1, CP0_TCRESTART
445 lw t1, VPEBOOTCFG_SP(t0)
446 mttgpr t1, sp
449 lw t1, VPEBOOTCFG_GP(t0)
450 mttgpr t1, gp
477 li t1, ~TCSTATUS_IXMT
478 and t0, t0, t1
497 mfc0 t1, CP0_MVPCONTROL
498 xori t1, t1, MVPCONTROL_VPC
499 mtc0 t1, CP0_MVPCONTROL
547 li t1, 2
548 sllv t0, t1, t0
551 _EXT t1, v0, MIPS_CONF1_IS_SHF, MIPS_CONF1_IS_SZ
552 xori t2, t1, 0x7
555 addiu t1, t1, 1
556 sllv t1, t3, t1
560 mul t1, t1, t0
561 mul t1, t1, t2
564 PTR_ADD a1, a0, t1
574 li t1, 2
575 sllv t0, t1, t0
578 _EXT t1, v0, MIPS_CONF1_DS_SHF, MIPS_CONF1_DS_SZ
579 xori t2, t1, 0x7
582 addiu t1, t1, 1
583 sllv t1, t3, t1
587 mul t1, t1, t0
588 mul t1, t1, t2
591 PTR_ADDU a1, a0, t1
621 psstate t1
629 psstate t1