34 #define GIC_ACCESSOR_RO(sz, off, name)					\  argument
35 	CPS_ACCESSOR_RO(gic, sz, MIPS_GIC_SHARED_OFS + off, name)
38 #define GIC_ACCESSOR_RW(sz, off, name)					\  argument
39 	CPS_ACCESSOR_RW(gic, sz, MIPS_GIC_SHARED_OFS + off, name)
42 #define GIC_VX_ACCESSOR_RO(sz, off, name)				\  argument
43 	CPS_ACCESSOR_RO(gic, sz, MIPS_GIC_LOCAL_OFS + off, vl_##name)	\
44 	CPS_ACCESSOR_RO(gic, sz, MIPS_GIC_REDIR_OFS + off, vo_##name)
47 #define GIC_VX_ACCESSOR_RW(sz, off, name)				\  argument
48 	CPS_ACCESSOR_RW(gic, sz, MIPS_GIC_LOCAL_OFS + off, vl_##name)	\
49 	CPS_ACCESSOR_RW(gic, sz, MIPS_GIC_REDIR_OFS + off, vo_##name)
52 #define GIC_ACCESSOR_RO_INTR_REG(sz, off, stride, name)			\  argument
60 	BUILD_BUG_ON(sz != 32);						\
65 #define GIC_ACCESSOR_RW_INTR_REG(sz, off, stride, name)			\  argument
66 	GIC_ACCESSOR_RO_INTR_REG(sz, off, stride, name)			\
71 	BUILD_BUG_ON(sz != 32);						\
76 #define GIC_VX_ACCESSOR_RO_INTR_REG(sz, off, stride, name)		\  argument
77 	GIC_ACCESSOR_RO_INTR_REG(sz, MIPS_GIC_LOCAL_OFS + off,		\
79 	GIC_ACCESSOR_RO_INTR_REG(sz, MIPS_GIC_REDIR_OFS + off,		\
83 #define GIC_VX_ACCESSOR_RW_INTR_REG(sz, off, stride, name)		\  argument
84 	GIC_ACCESSOR_RW_INTR_REG(sz, MIPS_GIC_LOCAL_OFS + off,		\
86 	GIC_ACCESSOR_RW_INTR_REG(sz, MIPS_GIC_REDIR_OFS + off,		\
154 #define GIC_VX_ACCESSOR_RO_INTR_BIT(sz, off, name)			\  argument
155 	GIC_ACCESSOR_RO_INTR_BIT(sz, MIPS_GIC_LOCAL_OFS + off,		\
157 	GIC_ACCESSOR_RO_INTR_BIT(sz, MIPS_GIC_REDIR_OFS + off,		\
161 #define GIC_VX_ACCESSOR_RW_INTR_BIT(sz, off, name)			\  argument
162 	GIC_ACCESSOR_RW_INTR_BIT(sz, MIPS_GIC_LOCAL_OFS + off,		\
164 	GIC_ACCESSOR_RW_INTR_BIT(sz, MIPS_GIC_REDIR_OFS + off,		\