Lines Matching refs:MIPS_CP0_32
27 #define MIPS_CP0_32(_R, _S) \ macro
33 #define KVM_REG_MIPS_CP0_INDEX MIPS_CP0_32(0, 0)
37 #define KVM_REG_MIPS_CP0_CONTEXTCONFIG MIPS_CP0_32(4, 1)
40 #define KVM_REG_MIPS_CP0_PAGEMASK MIPS_CP0_32(5, 0)
41 #define KVM_REG_MIPS_CP0_PAGEGRAIN MIPS_CP0_32(5, 1)
48 #define KVM_REG_MIPS_CP0_WIRED MIPS_CP0_32(6, 0)
49 #define KVM_REG_MIPS_CP0_PWCTL MIPS_CP0_32(6, 6)
50 #define KVM_REG_MIPS_CP0_HWRENA MIPS_CP0_32(7, 0)
52 #define KVM_REG_MIPS_CP0_BADINSTR MIPS_CP0_32(8, 1)
53 #define KVM_REG_MIPS_CP0_BADINSTRP MIPS_CP0_32(8, 2)
54 #define KVM_REG_MIPS_CP0_COUNT MIPS_CP0_32(9, 0)
56 #define KVM_REG_MIPS_CP0_COMPARE MIPS_CP0_32(11, 0)
57 #define KVM_REG_MIPS_CP0_STATUS MIPS_CP0_32(12, 0)
58 #define KVM_REG_MIPS_CP0_INTCTL MIPS_CP0_32(12, 1)
59 #define KVM_REG_MIPS_CP0_CAUSE MIPS_CP0_32(13, 0)
61 #define KVM_REG_MIPS_CP0_PRID MIPS_CP0_32(15, 0)
63 #define KVM_REG_MIPS_CP0_CONFIG MIPS_CP0_32(16, 0)
64 #define KVM_REG_MIPS_CP0_CONFIG1 MIPS_CP0_32(16, 1)
65 #define KVM_REG_MIPS_CP0_CONFIG2 MIPS_CP0_32(16, 2)
66 #define KVM_REG_MIPS_CP0_CONFIG3 MIPS_CP0_32(16, 3)
67 #define KVM_REG_MIPS_CP0_CONFIG4 MIPS_CP0_32(16, 4)
68 #define KVM_REG_MIPS_CP0_CONFIG5 MIPS_CP0_32(16, 5)
69 #define KVM_REG_MIPS_CP0_CONFIG7 MIPS_CP0_32(16, 7)