45 	emma2rh_out32(reg_index, reg_value | reg_bitmask);  in emma2rh_irq_enable()
57 	emma2rh_out32(reg_index, reg_value & ~reg_bitmask);  in emma2rh_irq_disable()
83 	emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg);  in emma2rh_sw_irq_enable()
93 	emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg);  in emma2rh_sw_irq_disable()
119 	emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);  in emma2rh_gpio_irq_enable()
129 	emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);  in emma2rh_gpio_irq_disable()
136 	emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~(1 << irq));  in emma2rh_gpio_irq_ack()
144 	emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~(1 << irq));  in emma2rh_gpio_irq_mask_ack()
148 	emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);  in emma2rh_gpio_irq_mask_ack()
254 	emma2rh_out32(EMMA2RH_BHIF_INT_EN_0, 0);  in arch_init_irq()
255 	emma2rh_out32(EMMA2RH_BHIF_INT_EN_1, 0);  in arch_init_irq()
256 	emma2rh_out32(EMMA2RH_BHIF_INT_EN_2, 0);  in arch_init_irq()
257 	emma2rh_out32(EMMA2RH_BHIF_INT1_EN_0, 0);  in arch_init_irq()
258 	emma2rh_out32(EMMA2RH_BHIF_INT1_EN_1, 0);  in arch_init_irq()
259 	emma2rh_out32(EMMA2RH_BHIF_INT1_EN_2, 0);  in arch_init_irq()
260 	emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, 0);  in arch_init_irq()
269 	emma2rh_out32(EMMA2RH_GPIO_DIR, reg & ~GPIO_PCI);  in arch_init_irq()
272 	emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg & ~GPIO_PCI);  in arch_init_irq()
275 	emma2rh_out32(EMMA2RH_GPIO_INT_MODE, reg | GPIO_PCI);  in arch_init_irq()
277 	emma2rh_out32(EMMA2RH_GPIO_INT_CND_A, reg & (~GPIO_PCI));  in arch_init_irq()
279 	emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~GPIO_PCI);  in arch_init_irq()