Lines Matching refs:emma2rh_in32
43 reg_value = emma2rh_in32(reg_index); in emma2rh_irq_enable()
55 reg_value = emma2rh_in32(reg_index); in emma2rh_irq_disable()
81 reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN); in emma2rh_sw_irq_enable()
91 reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN); in emma2rh_sw_irq_disable()
117 reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK); in emma2rh_gpio_irq_enable()
127 reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK); in emma2rh_gpio_irq_disable()
146 reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK); in emma2rh_gpio_irq_mask_ack()
186 intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_0) & in emma2rh_irq_dispatch()
187 emma2rh_in32(EMMA2RH_BHIF_INT_EN_0); in emma2rh_irq_dispatch()
192 swIntStatus = emma2rh_in32(EMMA2RH_BHIF_SW_INT) in emma2rh_irq_dispatch()
193 & emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN); in emma2rh_irq_dispatch()
212 intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_1) & in emma2rh_irq_dispatch()
213 emma2rh_in32(EMMA2RH_BHIF_INT_EN_1); in emma2rh_irq_dispatch()
218 gpioIntStatus = emma2rh_in32(EMMA2RH_GPIO_INT_ST) in emma2rh_irq_dispatch()
219 & emma2rh_in32(EMMA2RH_GPIO_INT_MASK); in emma2rh_irq_dispatch()
238 intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_2) & in emma2rh_irq_dispatch()
239 emma2rh_in32(EMMA2RH_BHIF_INT_EN_2); in emma2rh_irq_dispatch()
268 reg = emma2rh_in32(EMMA2RH_GPIO_DIR); in arch_init_irq()
271 reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK); in arch_init_irq()
274 reg = emma2rh_in32(EMMA2RH_GPIO_INT_MODE); in arch_init_irq()
276 reg = emma2rh_in32(EMMA2RH_GPIO_INT_CND_A); in arch_init_irq()