Lines Matching refs:clk_periph
51 clocks = <&clk_periph PERIPH_CLK_I2C0>,
54 assigned-clocks = <&clk_periph PERIPH_CLK_I2C0_PRE_DIV>,
55 <&clk_periph PERIPH_CLK_I2C0_DIV>;
69 clocks = <&clk_periph PERIPH_CLK_I2C1>,
72 assigned-clocks = <&clk_periph PERIPH_CLK_I2C1_PRE_DIV>,
73 <&clk_periph PERIPH_CLK_I2C1_DIV>;
87 clocks = <&clk_periph PERIPH_CLK_I2C2>,
90 assigned-clocks = <&clk_periph PERIPH_CLK_I2C2_PRE_DIV>,
91 <&clk_periph PERIPH_CLK_I2C2_DIV>;
105 clocks = <&clk_periph PERIPH_CLK_I2C3>,
108 assigned-clocks = <&clk_periph PERIPH_CLK_I2C3_PRE_DIV>,
109 <&clk_periph PERIPH_CLK_I2C3_DIV>;
248 clocks = <&clk_periph PERIPH_CLK_PWM>,
741 clocks = <&clk_periph PERIPH_CLK_COUNTER_FAST>,
751 clocks = <&clk_periph PERIPH_CLK_WD>, <&cr_periph SYS_CLK_WD>;
753 assigned-clocks = <&clk_periph PERIPH_CLK_WD_PRE_DIV>,
754 <&clk_periph PERIPH_CLK_WD_DIV>;
762 clocks = <&clk_periph PERIPH_CLK_IR>, <&cr_periph SYS_CLK_IR>;
764 assigned-clocks = <&clk_periph PERIPH_CLK_IR_PRE_DIV>,
765 <&clk_periph PERIPH_CLK_IR_DIV>;
854 clk_periph: clk@18144800 { label
865 clocks = <&clk_periph PERIPH_CLK_SYS>;
888 <&clk_periph PERIPH_CLK_ROM>;