Lines Matching refs:interrupt
30 cpu_intc: interrupt-controller {
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
35 #interrupt-cells = <1>;
59 periph_intc: interrupt-controller@41a400 {
63 interrupt-controller;
64 #interrupt-cells = <1>;
66 interrupt-parent = <&cpu_intc>;
70 sun_l2_intc: interrupt-controller@403000 {
73 interrupt-controller;
74 #interrupt-cells = <1>;
75 interrupt-parent = <&periph_intc>;
83 interrupt-parent = <&sun_l2_intc>;
93 upg_irq0_intc: interrupt-controller@406780 {
100 interrupt-controller;
101 #interrupt-cells = <1>;
103 interrupt-parent = <&periph_intc>;
105 interrupt-names = "upg_main", "upg_bsc";
108 upg_aon_irq0_intc: interrupt-controller@409480 {
116 interrupt-controller;
117 #interrupt-cells = <1>;
119 interrupt-parent = <&periph_intc>;
121 interrupt-names = "upg_main_aon", "upg_bsc_aon",
141 interrupt-parent = <&periph_intc>;
152 interrupt-parent = <&periph_intc>;
163 interrupt-parent = <&periph_intc>;
172 interrupt-parent = <&upg_aon_irq0_intc>;
175 interrupt-names = "upg_bsca";
182 interrupt-parent = <&upg_aon_irq0_intc>;
185 interrupt-names = "upg_bscb";
192 interrupt-parent = <&upg_irq0_intc>;
195 interrupt-names = "upg_bscc";
202 interrupt-parent = <&upg_irq0_intc>;
205 interrupt-names = "upg_bscd";
212 interrupt-parent = <&upg_irq0_intc>;
215 interrupt-names = "upg_bsce";
242 aon_pm_l2_intc: interrupt-controller@408440 {
245 interrupt-controller;
246 #interrupt-cells = <1>;
247 interrupt-parent = <&periph_intc>;
267 #interrupt-cells = <2>;
269 interrupt-controller;
270 interrupt-parent = <&upg_irq0_intc>;
279 #interrupt-cells = <2>;
281 interrupt-controller;
282 interrupt-parent = <&upg_aon_irq0_intc>;
299 interrupt-parent = <&periph_intc>;
321 interrupt-parent = <&periph_intc>;
331 interrupt-parent = <&periph_intc>;
340 interrupt-parent = <&periph_intc>;
350 interrupt-parent = <&periph_intc>;
359 interrupt-parent = <&periph_intc>;
369 interrupt-parent = <&periph_intc>;
378 interrupt-parent = <&periph_intc>;
388 interrupt-parent = <&periph_intc>;
393 hif_l2_intc: interrupt-controller@41a000 {
396 interrupt-controller;
397 #interrupt-cells = <1>;
398 interrupt-parent = <&periph_intc>;
408 interrupt-parent = <&hif_l2_intc>;
417 interrupt-parent = <&periph_intc>;
456 interrupt-parent = <&periph_intc>;
466 interrupt-parent = <&periph_intc>;
473 spi_l2_intc: interrupt-controller@41ad00 {
476 interrupt-controller;
477 #interrupt-cells = <1>;
478 interrupt-parent = <&periph_intc>;
491 interrupt-parent = <&spi_l2_intc>;
492 interrupt-names = "spi_lr_fullness_reached",
511 interrupt-parent = <&upg_aon_irq0_intc>;
512 interrupt-names = "mspi_done";
520 interrupt-parent = <&aon_pm_l2_intc>;
521 interrupt-names = "timer";